XCV2000E-8FG1156C Xilinx Inc, XCV2000E-8FG1156C Datasheet - Page 135

• Manufacturer Part Number: XCV2000E-8FG1156C
• Description: IC FPGA 1.8V C-TEMP 1156-BGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV2000E-8FG1156C

• Number Of Logic Elements/cells: 43200
• Number Of Labs/clbs: 9600
• Total Ram Bits: 655360
• Number Of I /o: 804
• Number Of Gates: 2541952
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1156-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 16: FG256 Package — XCV50E, XCV100E,
XCV200E, XCV300E
DS022-4 (v2.5) March 14, 2003
Production Product Specification
Notes:
1.
2.
Bank
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
V
otherwise, I/O option only.
V
I/O option only.
REF
REF
or I/O option only in the XCV100E, 200E, 300E;
or I/O option only in the XCV200E, 300E; otherwise,
R
Pin Description
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin #
H10
G11
G10
K11
K10
F11
F10
B15
A16
J10
G9
G8
G7
G6
K9
K8
K7
K6
H9
H8
H7
B2
A1
F7
F6
J9
J8
J7
www.xilinx.com
1-800-255-7778
FG256 Differential Pin Pairs
Virtex-E devices have differential pin pairs that can also pro-
vide other functions when not used as a differential pair. A √
in the AO column indicates that the pin pair can be used as
an asynchronous output for all devices provided in this
package. Pairs with a note number in the AO column are
device dependent. They can have asynchronous outputs if
the pin pair are in the same CLB row and column in the
device. Numbers in this column refer to footnotes that indi-
cate which devices have pin pairs than can be asynchro-
nous outputs. The Other Functions column indicates
alternative function(s) not available when the pair is used as
a differential pair or differential clock.
Table 17: FG256 Differential Pin Pair Summary
XCV50E, XCV100E, XCV200E, XCV300E
Pair
10
11
12
13
14
15
16
17
18
0
1
2
3
0
1
2
3
4
5
6
7
8
9
Virtex™-E 1.8 V Field Programmable Gate Arrays
Total Pairs: 83, Asynchronous Outputs: 35
Bank
4
5
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
Global Differential Clock
D10
D11
C11
D12
C12
A11
E11
B13
Pin
N8
R8
C9
B8
A3
E6
A4
B5
A5
C7
C8
A6
A8
A9
B9
P
IO LVDS
E10
A10
C10
B11
A12
A13
B12
A14
C13
Pin
N9
C5
D5
D6
C6
D7
D9
T8
A8
A7
B4
B6
B7
A7
N
AO
NA
NA
NA
NA
NA
7
√
√
2
√
√
1
1
2
1
1
√
√
2
√
√
7
√
IO_LVDS_DLL
IO_DLL_L52N
IO_DLL_L52P
IO_DLL_L8P
IO_DLL_L8N
Functions
Module 4 of 4
Other
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
CS
-
-
-
-
-
-
-
-
-
49