XCV2000E-8FG1156C Xilinx Inc, XCV2000E-8FG1156C Datasheet - Page 201

• Manufacturer Part Number: XCV2000E-8FG1156C
• Description: IC FPGA 1.8V C-TEMP 1156-BGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV2000E-8FG1156C

• Number Of Logic Elements/cells: 43200
• Number Of Labs/clbs: 9600
• Total Ram Bits: 655360
• Number Of I /o: 804
• Number Of Gates: 2541952
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1156-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

FG900 Differential Pin Pairs
Virtex-E devices have differential pin pairs that can also pro-
vide other functions when not used as a differential pair. A √
in the AO column indicates that the pin pair can be used as
an asynchronous output for all devices provided in this
package. Pairs with a note number in the AO column are
device dependent. They can have asynchronous outputs if
the pin pair are in the same CLB row and column in the
device. Numbers in this column refer to footnotes that indi-
cate which devices have pin pairs than can be asynchro-
nous outputs. The Other Functions column indicates
alternative function(s) not available when the pair is used as
a differential pair or differential clock.
Table 27: FG900 Differential Pin Pair Summary
XCV600E, XCV1000E, XCV1600E
DS022-4 (v2.5) March 14, 2003
Production Product Specification
Pair
10
11
12
13
14
15
16
17
3
2
1
0
0
1
2
3
4
5
6
7
8
9
Total Pairs: 283, Asynchronous Output Pairs: 168
Bank
0
1
5
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
AK16
AJ16
C15
E15
N11
H10
H11
B10
F10
Pin
J10
J11
J12
G8
H9
D6
C9
F7
B5
F8
E8
B7
A9
P
GCLK LVDS
IO LVDS
AH16
AF16
G10
G11
A15
E16
E10
Pin
G9
C4
D5
A3
B4
A4
E7
A5
D7
A6
C7
C8
A8
D9
B9
N
AO
NA
NA
NA
NA
NA
NA
NA
4
2
2
2
√
√
1
1
√
√
2
2
√
√
4
IO_DLL_ 177N
IO_DLL_ 177P
IO_DLL_ 34N
IO_DLL_ 34P
Functions
Other
VREF
VREF
VREF
VREF
VREF
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
1-800-255-7778
Table 27: FG900 Differential Pin Pair Summary
XCV600E, XCV1000E, XCV1600E
Pair
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Virtex™-E 1.8 V Field Programmable Gate Arrays
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C10
D11
G12
C11
D12
A11
K13
B13
B14
H15
D15
E16
H16
K15
G16
E17
C17
A18
A19
G18
H18
K17
A20
C20
E20
D21
A21
F11
B12
E13
F16
F19
Pin
J14
J15
P
G13
G14
G19
H12
H13
E11
B11
F12
A10
E12
A12
F13
D14
A14
K14
B15
F15
A15
B16
A16
C16
K16
A17
F17
E18
D18
B19
D19
F18
B20
D20
K18
B21
F20
Pin
N
AO
NA
NA
4
2
2
2
√
√
1
1
√
√
2
2
√
√
√
4
4
√
√
2
2
√
√
1
1
√
√
2
2
2
4
√
IO_ LVDS_DLL
Functions
Module 4 of 4
Other
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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