PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 88
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
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NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
3.5 Semaphores
3.6 I
After wake-up from sleep mode, the TM3260 CPU can examine the tentative wake-up
attempt, and if the wake-up is genuine, bring the system back to full operational
mode.
In addition, the clocks to individual unused modules can be turned off altogether and
the idle() task of the operating system can be used to activate a voluntary powerdown
mechanism in the CPU. These modes are not managed by a hardware power mode
controller, but by software using the standard provisions of the CPU and the clock
system.
The semaphore module implements 16 semaphores for mutual-exclusion in a multi-
processor environment. Each processor in the system (at board level) can request a
particular semaphore. All 16 semaphores are accessed through the same bus which
guarantees atomic accesses.
There is no built-in mapping of semaphores to sharable hardware system resources.
Such mapping is done by software convention.
Each semaphore behaves as follows:
Only the lower 12 bits of the semaphore are writable. These lower 12 bits are used by
software to write a unique ID decided by software convention. The upper 20 bits
always return 0 when read.
The I
capability. The I
which runs at 100 kHz, and the fast mode, which runs at 400 kHz.
The I
peripherals like video/audio ADC/DACs at board level.
2
C Interface
–
–
–
if (current_content == 0)
else if (write_value == 0) new_content = 0;
2
2
C interface on the PNX15xx/952x Series provides I
C interface may be used to connect an optional boot EEPROM and/or other
an external wake-up event on pin GPIO[15]. When entering in sleep mode, the
GPIO[15] pin state (i.e. value of the pin) is sampled and registered. The CPU
is woken up if the pin GPIO[15] changes state (from low to high) after the
system has gone into sleep mode. The GPIO[15] pin is observable by
software.
an expired internal counter. Before entering in sleep mode, this special
counter is set up to count XTAL_IN clock ticks. Once the count is satisfied, the
CPU is woken up. The counter has 32 bits.
an incoming event is detected by the GPIO module (could be a Remote
Control ‘power on’ command). Before going into sleep mode, the CPU sets the
GPIO event queues to monitor a selected group of GPIO pins. Once the
queues are full or have monitored an event, the CPU is woken up (via an
interrupt). This is a more sophisticated wake-up event than the wake-up upon
transition on GPIO[15] pin event, since several events are sampled and
therefore keep the GPIO alive.
2
Rev. 4.0 — 03 December 2007
C interface supports two operating modes, the standard mode,
new_content = write_value;
PNX15xx/952x Series
2
C master and slave
Chapter 2: Overview
© NXP B.V. 2007. All rights reserved.
2-88
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