PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 415
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
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Philips Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX15XX_SER_3
Product data sheet
Bit
15:8
7:0
Offset 0x10 E2A4
31:16
15:8
7:0
Offset 0x10 E2A8
31:22
21:16
15:12
11:0
Offset 0x10 E2AC
31:28
27:16
15:7
5:0
Offset 0x10 E2B0
31:26
Symbol
ColorKeyROP1
ColorKeyROP2
Unused
ColorKeyROP3
ColorKeyROP4
Unused
PCoeff
Unused
DPCoeff
Unused
HSRU_d_phase
Unused
HSRU_phase
Unused
Color Key ROPs 3/4
INTR
HSRU Phase
HSRU Delta Phase
…Continued
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
-
0
0
-
-
-
-
-
0
-
0
-
Value
Rev. 3 — 17 March 2006
Description
This ROP determines if results of component color keying are true
or not. Keys to the ROP are range_match upper, middle, lower.
Upper match is key2, middle match is key1, lower match is key0.
This ROP determines if results of component color keying are true
or not. Keys to the ROP are range_match upper, middle, lower.
Upper match is key2, middle match is key1, lower match is key0.
This ROP determines if results of component color keying are true
or not. Keys to the ROP are range_match upper, middle, lower.
Upper match is key2, middle match is key1, lower match is key0.
This ROP determines if the results of component color keying are
true or not. Keys to the ROP are range_match upper, middle, lower.
Upper match is key2, middle match is key1, lower match is key0.
Phase coefficient
Differential phase coefficient
For the interpolator to work in bypass mode this register has to be
programmed to 0
Unsigned. This delta phase is added with phase with every output
data. Once phase is added with a certain number of d_phases to
get overflowed, then it’s time shift input sample signals.
For the HSRU to work in bypass mode this register has to be
programmed to 0.
Example:
8000 (hex) => upscaling by 2
4000 (hex) => upscaling by 4
Unsigned. This is the initial phase of input pixel phase. It determines
the portions of the first input samples used to generate output
pixels.
0 = Color key didn’t match.
1 = Color key matched.
0 = Color key didn’t match.
1 = Color key matched.
0 = Color key didn’t match.
1 = Color key matched.
0 = Color key didn’t match.
1 = Color key matched.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
Chapter 11: QVCP
11-62
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