PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 708
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
- Current page: 708 of 828
- Download datasheet (8Mb)
Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
5.4.3 Tx(Rt) DMA Manager Reads Tx(Rt) Descriptor Arrays
5.4.4 Tx(Rt) DMA manager transmits data
If transmitting other than the last fragment of a multi-fragment packet, the Last bit in
the descriptor must be set to 0; for the last fragment the Last bit must be set to 1. To
trigger an interrupt when the packet has been transmitted and transmission status
has been committed to memory, set the Interrupt bit in the descriptor Control field to
1. To have the hardware add a CRC in the frame sequence control field of this
Ethernet frame, set the CRC bit in the descriptor. This should be done if the CRC has
not already been added by software. To enable automatic padding of small packets to
the minimum required packet size, set the Pad bit in the Control field of the descriptor
to 1. In typical applications bits CRC and Pad are both set to 1.
The device driver can set up interrupts using the IntEnable register to wait for a
completion signal from the hardware, or it can periodically inspect (poll) the progress
of transmission. It can also add new packets at the end of the descriptor FIFO, while
hardware consumes descriptors at the start of the FIFO.
The device driver can stop the transmit process by resetting Command.TxEnable and
Command.TxRTEnable to 0. The transmission will not stop immediately; packets
already being transmitted will be transmitted completely and the status will be
committed to memory before deactivating the datapath. The status of the Transmit
Datapath can be monitored by the device driver reading the TxRtStatus/TxStatus bits
in the Status register.
As soon as the (non-) real-time Transmit Datapath is enabled and the corresponding
Tx(Rt)ConsumeIndex and Tx(Rt)ProduceIndex are not equal (i.e. the hardware still
must process packets from the descriptor FIFO), the Tx(Rt)Status bit in the Status
register will return to 1 (active).
When the TxEnable bit (TxRtEnable bit for real-time traffic) is set, the Tx DMA
manager reads the descriptors from memory using block transfers at the address
determined by TxDescriptor and TxConsumeIndex, or, for real-time traffic, at the
address determined by TxRtDescriptor and TxRtConsumeIndex. The block size of
the block transfer is determined by the total number of descriptors owned by the
hardware, which equals Tx(Rt)ProduceIndex – Tx(Rt)ConsumeIndex.
After reading the descriptor, the transmit DMA engine reads the associated packet
data from memory and transmits the packet. After the transfer is complete, the Tx
DMA manager writes status information back to the StatusInfo and StatusTimeStamp
words of the status. The value of the Tx(Rt)ConsumeIndex is only updated after
status information has been committed to memory. The Tx DMA manager continues
to transmit packets until the descriptor FIFO is empty. If the transmit FIFO is empty,
the Tx(Rt)Status bit in the Status register will return to 0 (inactive). If the descriptor
FIFO is empty, the Ethernet hardware will set the Tx(Rt)FinishedInt bit of the
IntStatus register. The Transmit Datapath will still be enabled.
The Tx DMA manager inspects the Last bit of the descriptor Control field when
loading the descriptor. If the Last bit is 0, this indicates that the packet consists of
multiple fragments. The Tx DMA manager gathers all the fragments from the host
memory visiting a string of packet descriptors. It appends the fragments, and sends
Rev. 3 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
23-39
Related parts for PNX1502E/G,557
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Digital Signal Processors & Controllers (DSP, DSC) MEDIA PROCESSOR PNX15XX/300MHZ
Manufacturer:
NXP Semiconductors
Part Number:
Description:
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2458 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2468 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2470 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The Philips Semiconductors XA (eXtended Architecture) family of 16-bit single-chip microcontrollers is powerful enough to easily handle the requirements of high performance embedded applications, yet inexpensive enough to compete in the market for hi
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The XA-S3 device is a member of Philips Semiconductors? XA(eXtended Architecture) family of high performance 16-bitsingle-chip microcontrollers
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP BlueStreak LH75401/LH75411 family consists of two low-cost 16/32-bit System-on-Chip (SoC) devices
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer:
NXP Semiconductors
Datasheet:
Part Number:
Description:
The NXP LPC3141 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3143 combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors
Part Number:
Description:
The NXP LPC3152 combines an 180 MHz ARM926EJ-S CPU core, High-speed USB 2
Manufacturer:
NXP Semiconductors