PNX1502E/G,557 NXP Semiconductors, PNX1502E/G,557 Datasheet - Page 731
PNX1502E/G,557
Manufacturer Part Number
PNX1502E/G,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Specifications of PNX1502E/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Compliant
Other names
568-1298
935277748557
PNX1502E/G
935277748557
PNX1502E/G
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Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
5.12.1 Overview
5.12 Receive filtering
In half-duplex mode, when the TxFlowControl bit goes high, continuous preamble is
sent until TxFlowControl is deasserted. If the medium is idle, the LAN100 begins
transmitting its preamble, which raises carrier sense, causing all other stations to
defer. In the event that transmitting the preamble causes a collision, the back
pressure “rides through” the collision. The colliding station backs off, and then defers
to the back pressure. During back pressure, if the user wishes to send a frame, the
back pressure is interrupted, the frame is sent, and then the back pressure is
resumed. If TxFlowControl is asserted for longer than 3.3 ms in 10 Mbps mode or
0.33 ms in 100 Mbps mode, back pressure will cease sending preamble for several
byte times to avoid the jabber limit.
The Ethernet module can filter out receive packets, analyzing the Ethernet
destination address in the packet. This capability greatly reduces the load on the host
system, because the many Ethernet packets that are typically addressed to other
stations would otherwise have to be inspected and rejected by the device driver
software, while using up bandwidth, memory space and host CPU time. Address
filtering can be implemented using the perfect address filter or the (imperfect) hash
filter. The latter produces a 6-bit hash code which can be used as an index into a
64-entry programmable hash table. In addition to the destination address, other
portions of a packet can be included in the filter decision by using a pattern match
filter. The result of the pattern-matching filter can be combined with the address
filtering to create the final filtering result.
The receive filter has two modes:
•
•
AND mode: The AndOr bit of the RxFilterCtrl register is set to 1. The result of the
perfect address filter and the hash filter is ORed into a partial result which is
ANDed with the result of the pattern-matching filter. If the pattern-matching filter
is not enabled, the filter will not pass any packets.
OR mode: The AndOr bit of the RxFilterCtrl register is set to 0. The result of the
perfect address filter and the hash filter is ORed into a partial result which is
ORed with the result of the pattern-matching filter.
Rev. 3 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
23-62
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