PIC10F200-I/P Microchip Technology, PIC10F200-I/P Datasheet
PIC10F200-I/P
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PIC10F200-I/P Summary of contents
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... Flash Microcontrollers 2004 Microchip Technology Inc. PIC10F200/202/204/206 Preliminary Data Sheet DS41239A ...
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... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fully static design • Wide operating voltage range: 2.0V to 5.5V • Wide temperature range: - Industrial Extended: - +125 C Peripheral Features (PIC10F200/202): • 4 I/O pins I/O pins with individual direction control - 1 input only pin - High current sink/source for direct LED drive - Wake-on-change - Weak pull-ups • ...
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... GP1/ICSPCLK 3 4 GP2/T0CKI/FOSC4 PDIP N GP2/T0CKI/FOSC4 GP1/ICSPCLK 4 5 TABLE 1-1: PIC10F2XX MEMORY AND FEATURES Program Memory Device Flash (words) PIC10F200 256 PIC10F202 512 PIC10F204 256 PIC10F206 512 DS41239A-page 2 SOT-23 GP0/ICSPDAT/CIN GP1/ICSPCLK/CIN- PDIP N/C GP3/MCLR GP2/T0CKI/COUT/FOSC4 N/C GP0/ICSPDAT GP1/ICSPCLK/CIN- Data Memory I/O SRAM (bytes) ...
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... PIC10F200/202/204/206 Device Varieties .................................................................................................................................. 7 3.0 Architectural Overview ................................................................................................................................................................. 9 4.0 Memory Organization ................................................................................................................................................................. 15 5.0 I/O Port ....................................................................................................................................................................................... 25 6.0 Timer0 Module and TMR0 Register (PIC10F200/202)............................................................................................................... 29 7.0 Timer0 Module and TMR0 Register (PIC10F204/206)............................................................................................................... 33 8.0 Comparator Module.................................................................................................................................................................... 37 9.0 Special Features of the CPU...................................................................................................................................................... 41 10.0 Instruction Set Summary ............................................................................................................................................................ 51 11.0 Development Support................................................................................................................................................................. 59 12 ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 4 Preliminary 2004 Microchip Technology Inc. ...
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... In-Circuit Serial Programming Number of Instructions Packages The PIC10F200/202/204/206 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC10F200/202/204/206 device uses serial programming with data pin GP0 and clock pin GP1. 2004 Microchip Technology Inc. ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 6 Preliminary 2004 Microchip Technology Inc. ...
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... A variety of packaging options are available. Depend- ing on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC10F200/202/204/206 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 8 Preliminary 2004 Microchip Technology Inc. ...
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... PIC10F206 512 x 12 The PIC10F200/202/204/206 devices can directly or indirectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC10F200/202/ 204/206 devices have a highly (symmetrical) instruction set that makes it possible to carry out any operation, on any register, using any addressing mode ...
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... PIC10F200/202/204/206 FIGURE 3-1: PIC10F200/202 BLOCK DIAGRAM 9-10 Program Counter Flash 512 x12 or 256 x12 Program Stack 1 Memory Stack 2 Program 12 Bus Instruction reg Direct Addr 8 Device Reset Timer Instruction Power-on Decode & Reset Control Watchdog Timer Timing Generation Internal RC Clock MCLR DS41239A-page 10 ...
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... Direct Addr 8 Device Reset Timer Instruction Power-on Decode & Reset Control Watchdog Timer Timing Generation Internal RC Clock MCLR 2004 Microchip Technology Inc. PIC10F200/202/204/206 8 Data Bus RAM bytes File Registers (1) RAM Addr 9 Addr MUX Indirect 5 5-7 Addr FSR reg Status reg ...
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... PIC10F200/202/204/206 TABLE 3-2: PIC10F200/202/204/206 PINOUT DESCRIPTION Input Name Function Type GP0/ICSPDAT/CIN+ GP0 ICSPDAT CIN+ GP1/ICSPCLK/CIN- GP1 ICSPCLK CIN- GP2/T0CKI/COUT/ GP2 FOSC4 T0CKI COUT FOSC4 GP3/MCLR/V GP3 PP MCLR Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input Analog input ...
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... All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction is “flushed” from the pipeline, while the new instruction is being fetched and then executed. 2004 Microchip Technology Inc. PIC10F200/202/204/206 3.2 Instruction Flow/Pipelining An instruction cycle consists of four Q cycles (Q1, Q2, Q3 and Q4) ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 14 Preliminary 2004 Microchip Technology Inc. ...
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... PIC10F200/204 are physically implemented (see Figure 4-1). Accessing a location above these boundaries will cause a wraparound within the first 256 x 12 space (PIC10F200/204). The effective Reset vector is at 0000h (see Figure 4-1). Location 00FFh (PIC10F200/204) contains the internal clock oscillator calibration value. This value should never be overwritten. ...
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... The General Purpose Registers are used for data and control information under command of the instructions. For the PIC10F200/204, the register file is composed of 7 Special Function Registers and 16 General Purpose Registers (see Figure 4-3 and Figure 4-4). For the PIC10F202/206, the register file is composed of 8 Special Function Registers and 24 General Purpose Registers (see Figure 4-4) ...
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... Purpose Registers 1Fh Note 1: Not a physical register. See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. 2: PIC10F204 only. Unimplemented on the PIC10F200 and reads as 00h. 3: Unimplemented, read as 00h. 2004 Microchip Technology Inc. PIC10F200/202/204/206 FIGURE 4-4: PIC10F202/206 REGISTER FILE MAP ...
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... The Special Function Registers associated with the “core” functions are described in this section. Those related to the operation of the peripheral features are described in the section for each peripheral feature. TABLE 4-1: SPECIAL FUNCTION REGISTER (SFR) SUMMARY (PIC10F200/202/204/206) Address Name Bit 7 Bit 6 00h ...
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... C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur Note 1: This bit is used on the PIC10F204/206. For code compatibility do not use this bit on the PIC10F200/202. Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. ...
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... PIC10F200/202/204/206 4.5 Option Register The Option register is a 8-bit wide, write-only register, which contains various control bits to configure the Timer0/WDT prescaler and Timer0. By executing the OPTION instruction, the contents of the W register will be transferred to the Option register. A Reset sets the OPTION<7:0> bits. ...
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... Minimum frequency bit 0 FOSC4: INTOSC/4 Output Enable bit 1 = INTOSC/4 output onto GP2 0 = GP2/T0CKI/COUT applied to GP2 Note 1: Overrides GP2/T0CKI/COUT control registers when enabled. Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC10F200/202/204/206 R/W-1 R/W-1 R/W-1 R/W-1 CAL4 CAL3 CAL2 CAL1 ( Writable bit U = Unimplemented bit, read as ‘ ...
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... MOVLW XX, the PC will roll over to location 0000h and begin executing user code. 4.8 Stack The PIC10F200/204 devices have a 2-deep, 8-bit wide hardware PUSH/POP stack. The PIC10F202/206 devices have a 2-deep, 9-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incremented by one, into Stack Level 1 ...
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... The FSR is a 5-bit wide register used in conjunc- tion with the INDF register to indirectly address the data memory area. The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. Note: PIC10F200/202/204/206 – Do not use banking. FSR <7:5> are unimplemented and read as ‘1’s. (opcode) 0 00h ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 24 Preliminary 2004 Microchip Technology Inc. ...
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... FIGURE 5-1: Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset Note 1: See Table 3-2 for buffer type. GP3 I/MCLR — — — Preliminary PIC10F200/202/204/206 EQUIVALENT CIRCUIT FOR A SINGLE I/O PIN I/O pin (1) RD Port DS41239A-page 25 ...
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... PIC10F200/202/204/206 TABLE 5-2: SUMMARY OF PORT REGISTERS Address Name Bit 7 Bit 6 N/A TRISGPIO — — N/A OPTION GPWU GPPU 03h STATUS GPWUF CWUF 06h GPIO — — Legend: Shaded cells are not used by Port registers, read as ‘0’, — = unimplemented, read as ‘0’ unknown unchanged depends on condition ...
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... FIGURE 5-2: SUCCESSIVE I/O OPERATION (PIC10F200/202/204/206 Instruction Fetched MOVWF GPIO MOVF GPIO, W GP<2:0> Port pin written here Instruction Executed MOVWF GPIO (Write to GPIO) 2004 Microchip Technology Inc. PIC10F200/202/204/206 This example shows a write to GPIO followed by a read from GPIO. NOP NOP Data setup time = (0 ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 28 Preliminary 2004 Microchip Technology Inc. ...
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... TIMER0 MODULE AND TMR0 REGISTER (PIC10F200/202) The Timer0 module has the following features: • 8-bit timer/counter register, TMR0 • Readable and writable • 8-bit software programmable prescaler • Internal or external clock select: - Edge select for external clock Figure 6 simplified block diagram of the Timer0 module ...
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... Legend: Shaded cells not used by Timer0. — = unimplemented unknown unchanged. Note 1: The TRIS of the T0CKI pin is overridden when T0CS = 1. 6.1 Using Timer0 with an External Clock (PIC10F200/202) When an external clock input is used for Timer0, it must meet certain requirements. The external clock require- ment is due to internal phase clock (T OSC tion ...
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... TMR0 register (e.g., CLRF 1, MOVWF 1, BSF 1,x, etc.) will clear the prescaler. When assigned to WDT, a CLRWDT instruction will clear the prescaler along with the WDT. The prescaler is neither readable nor writable Reset, the prescaler contains all ‘0’s. 2004 Microchip Technology Inc. PIC10F200/202/204/206 ( ...
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... FIGURE 6-5: BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER /4) CY OSC (2) GP2/T0CKI Pin (1) T0SE Watchdog Timer WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the Option register. 2: T0CKI is shared with pin GP2 on the PIC10F200/202/204/206. DS41239A-page 32 EXAMPLE 6-2: CLRWDT MOVLW ‘xxxx0xxx’ OPTION ...
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... The prescaler is shared with the Watchdog Timer (Figure 7-5). 3: Bit CMPT0CS is located in the CMCON0 register, CMCON0<4>. 2004 Microchip Technology Inc. PIC10F200/202/204/206 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (Option< ...
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... PIC10F200/202/204/206 FIGURE 7-2: TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE (Program Counter) PC – Instruction MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W Fetch Timer0 Instruction Executed FIGURE 7-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1 (Program PC – Counter) Instruction MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W ...
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... TMR0 register (e.g., CLRF 1, MOVWF 1, BSF 1,x, etc.) will clear the prescaler. When assigned to WDT, a CLRWDT instruction will clear the prescaler along with the WDT. The prescaler is neither readable nor writable Reset, the prescaler contains all ‘0’s. 2004 Microchip Technology Inc. PIC10F200/202/204/206 ( ...
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... PIC10F200/202/204/206 To change the prescaler from the WDT to the Timer0 module, use the sequence shown in Example 7.2. This sequence must be used even if the WDT is disabled. A CLRWDT instruction should be executed before switching the prescaler. FIGURE 7-5: BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER (2) GP2/T0CKI /4) CY ...
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... When the comparator is turned on, these control bits assert themselves. When the comparator is off, these bits have no effect on the device operation and the other control registers have precedence. 3: PIC10F204/206 only. Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC10F200/202/204/206 one analog R/W-1 R/W-1 R/W-1 R/W-1 POL CMPT0CS ...
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... PIC10F200/202/204/206 8.1 Comparator Configuration The on-board comparator inputs, (GP0/CIN+, GP1/ CIN-), as well as the comparator output (GP2/COUT) are steerable. The CMCON0, OPTION, and TRIS registers are used to steer these pins (see Figure 8-1). If the Comparator mode is changed, the comparator output level may not be valid for the specified mode change delay shown in Table 12-1 ...
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... Please see Table 12-1 for comparator specifications. 2004 Microchip Technology Inc. PIC10F200/202/204/206 8.5 Comparator Output The comparator output is read through CMCON0 register. This bit is read-only. The comparator output + is less may also be used internally, see Figure 8-1. ...
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... PIC10F200/202/204/206 FIGURE 8-3: ANALOG INPUT MODE R < PIN Legend Input Capacitance PIN V = Threshold Voltage Leakage Current At The Pin LEAKAGE R = Interconnect Resistance Source Impedance Analog Voltage TABLE 8-2: REGISTERS ASSOCIATED WITH COMPARATOR MODULE Address Name Bit 7 Bit 6 03h STATUS GPWUF CWUF 07h ...
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... WDT enabled 0 = WDT disabled bit 1-0 Reserved: Read as ‘0’ Note 1: Refer to the “PIC10F200/202/204/206 Memory Programming Specifications” (DS41228) to determine how to access the Configuration Word. The Configuration Word is not user addressable during device operation. 2: INTRC is the only oscillator mode offered on the PIC10F200/202/204/206. ...
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... Erasing the device will also erase the pre- programmed internal calibration value for the internal oscillator. The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later. TABLE 9-1: RESET CONDITIONS FOR REGISTERS – PIC10F200/202/204/206 Register Address W — INDF 00h ...
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... MCLR SELECT GPWU GP3/MCLR/V MCLRE 9.4 Power-on Reset (POR) The PIC10F200/202/204/206 devices incorporate an on-chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...
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... PIC10F200/202/204/206 FIGURE 9-2: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT V DD Power-up Detect GP3/MCLR/V PP MCLRE WDT Reset WDT Time-out Pin Change Sleep Wake-up on pin change Reset FIGURE 9-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW MCLR Internal POR DRT Time-out Internal Reset FIGURE 9-4: ...
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... DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 2004 Microchip Technology Inc. PIC10F200/202/204/206 V1 TDRT time-out expires long before V DRT DD Preliminary ): SLOW V RISE DD DD has reached its final V min ...
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... PIC10F200/202/204/206 9.5 Device Reset Timer (DRT) On the PIC10F200/202/204/206 devices, the DRT runs any time the device is powered up. The DRT operates on an internal oscillator. The processor is kept in Reset as long as the DRT is active. The DRT delay allows V to rise above V DD for the oscillator to stabilize. ...
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... SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER Address Name Bit 7 Bit 6 N/A OPTION GPWU GPPU T0CS Legend: Shaded boxes = Not used by Watchdog Timer, — = unimplemented, read as ‘0’ unchanged. 2004 Microchip Technology Inc. PIC10F200/202/204/206 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 ...
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... A Brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a Brown-out. To reset PIC10F200/202/204/206 devices when a Brown-out occurs, external Brown-out protection circuits may be built, as shown in Figure 9-7 and Figure 9-8. ...
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... T0CKI input should MCLR/V pin must logic high level if MCLR is PP enabled. 2004 Microchip Technology Inc. PIC10F200/202/204/206 9.9.2 WAKE-UP FROM SLEEP The device can wake-up from Sleep through one of the following events external Reset input on GP3/MCLR/V when configured as MCLR. ...
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... In-Circuit Serial Programming™ The PIC10F200/202/204/206 microcontrollers can be serially programmed while in the end application circuit. This is simply done with two lines for clock and data, and three other lines for power, ground and the programming voltage ...
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... In the set of User defined term (font is courier) italics 2004 Microchip Technology Inc. PIC10F200/202/204/206 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... PIC10F200/202/204/206 TABLE 10-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW – Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. 2004 Microchip Technology Inc. PIC10F200/202/204/206 BCF Bit Clear f Syntax: [ label ] BCF Operands: ...
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... PIC10F200/202/204/206 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b Operands < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...
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... PC<10:9> Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from Status<6:5>. GOTO is a two-cycle instruction. 2004 Microchip Technology Inc. PIC10F200/202/204/206 INCF Increment f Syntax: [ label ] Operands [0,1] ...
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... PIC10F200/202/204/206 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d Operands [0,1] Operation: (W).OR. (f) (dest) Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C 2004 Microchip Technology Inc. PIC10F200/202/204/206 SLEEP Syntax: Operands: Operation: Status Affected: TO, PD, RBWUF Description: ...
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... PIC10F200/202/204/206 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands Operation: (W) TRIS register f Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [ label ] XORLW k Operands 255 Operation: (W) .XOR Status Affected: Z Description: The contents of the W register are XOR’ ...
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... CAN ® - PowerSmart - Analog 2004 Microchip Technology Inc. PIC10F200/202/204/206 11.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market. The MPLAB IDE is a Windows based application that contains: • ...
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... PIC10F200/202/204/206 11.3 MPLAB C17 and MPLAB C18 C Compilers The MPLAB C17 and MPLAB C18 Code Development Systems are complete ANSI C compilers for Microchip’s PIC17CXXX and PIC18CXXX family of microcontrollers. These compilers provide powerful integration capabilities, superior code optimization and ease of use not found with other compilers. ...
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... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. 2004 Microchip Technology Inc. PIC10F200/202/204/206 11.11 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...
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... PIC10F200/202/204/206 11.14 PICSTART Plus Development Programmer The PICSTART Plus development programmer is an easy-to-use, low-cost, prototype programmer. It con- nects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus development programmer supports most PICmicro devices pins ...
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... Microcontrollers” Handbook and a USB interface cable. Supports all current 8/14-pin Flash PIC microcontrollers, as well as many future planned devices. 2004 Microchip Technology Inc. PIC10F200/202/204/206 11.24 PICDEM USB PIC16C7X5 Demonstration Board The PICDEM USB Demonstration Board shows off the capabilities of the PIC16C745 and PIC16C765 USB microcontrollers ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 64 Preliminary 2004 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2004 Microchip Technology Inc. PIC10F200/202/204/206 ............................................................................... -0. > ...
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... PIC10F200/202/204/206 FIGURE 12-1: PIC10F200/202/204/206 VOLTAGE-FREQUENCY GRAPH, -40 C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 DS41239A-page Frequency (MHz) Preliminary T +125 2004 Microchip Technology Inc. ...
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... DC Characteristics: PIC10F200/202/204/206 (Industrial) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-down Current PD (4) D022 I WDT Current ...
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... PIC10F200/202/204/206 12.2 DC Characteristics: PIC10F200/202/204/206 (Extended) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3) D010 I Supply Current DD D020 I Power-down Current PD (4) D022 ...
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... DC CHARACTERISTICS: PIC10F200/202/204/206 (Industrial, Extended) TABLE 12-1: DC CHARACTERISTICS Param Sym Characteristic No. V Input Low Voltage IL I/O ports: D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR, T0CKI V Input High Voltage IH I/O ports: D040 with TTL buffer D040A D041 with Schmitt Trigger ...
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... Output Valid D305 V Internal Reference Voltage IVRF Legend: TBD = To Be Determined. * These parameters are characterized but not tested. Note 1: Response time measured with one comparator input TABLE 12-3: PULL-UP RESISTOR RANGES – PIC10F200/202/204/206 V (Volts) Temperature ( C) DD GP0/GP1 2.0 - 125 5.5 - 125 GP3 2 ...
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... Timing Parameter Symbology and Load Conditions – PIC10F200/202/204/206 The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy Cycle time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...
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... PIC10F200/202/204/206 TABLE 12-4: CALIBRATED INTERNAL RC FREQUENCIES – PIC10F200/202/204/206 AC CHARACTERISTICS Param Sym Characteristic No. F10 F Internal Calibrated OSC INTOSC Frequency Legend: TBD = To Be Determined. * These parameters are characterized but not tested. † Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested ...
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... TABLE 12-5: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER – PIC10F200/202/204/206 AC CHARACTERISTICS Param Sym Characteristic No MCLR Pulse Width (low Watchdog Timer Time-out Period WDT (no prescaler Device Reset Timer Period DRT 34 T I/O High-impedance from MCLR IOZ low * These parameters are characterized but not tested. ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 74 Preliminary 2004 Microchip Technology Inc. ...
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... DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. 2004 Microchip Technology Inc. PIC10F200/202/204/206 Preliminary DS41239A-page 75 ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 76 Preliminary 2004 Microchip Technology Inc. ...
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... Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2004 Microchip Technology Inc. PIC10F200/202/204/206 Example CH17 Example 10F206-I ...
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... PIC10F200/202/204/206 6-Lead Plastic Small Outline Transistor (CH or OT) (SOT-23 β Dimension Limits Number of Pins Pitch Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 2004 Microchip Technology Inc. PIC10F200/202/204/206 Units ...
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... PIC10F200/202/204/206 NOTES: DS41239A-page 80 Preliminary 2004 Microchip Technology Inc. ...
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... Instruction Flow/Pipelining .................................................. 13 Instruction Set Summary .................................................... 52 L Loading of PC ..................................................................... 22 M Memory Organization ......................................................... 15 Data Memory .............................................................. 16 Program Memory (PIC10F200/204) ........................... 15 Program Memory (PIC10F202/206) ........................... 16 MPLAB ASM30 Assembler, Linker, Librarian ..................... 60 MPLAB ICD 2 In-Circuit Debugger ..................................... 61 MPLAB ICE 2000 High-Performance Universal In-Circuit Emulator..................................................... 61 MPLAB ICE 4000 High-Performance Universal In-Circuit Emulator..................................................... 61 MPLAB Integrated Development Environment Software ...
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... PIC10F200/202/204/206 S Sleep ............................................................................. 41, 49 Software Simulator (MPLAB SIM)....................................... 60 Software Simulator (MPLAB SIM30)................................... 60 Special Features of the CPU............................................... 41 Special Function Registers ................................................. 18 Stack ................................................................................... 22 Status Register................................................................ Timer0 Timer0 ................................................................... 29, 33 Timer0 (TMR0) Module ......................................... 29, 33 TMR0 with External Clock..................................... 30, 34 Timing Parameter Symbology and Load Conditions........... 71 TRIS Registers.................................................................... 25 W Wake-up from Sleep ...
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... Conferences for products, Development Systems, technical information and more • Listing of seminars and events 2004 Microchip Technology Inc. PIC10F200/202/204/206 SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip’ ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC10F200/202/204/206 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... SOT-23, 6-LD (Pb-free) Pattern Special Requirements Note: Tape and Reel available for only the following packages: SOT-23. 2004 Microchip Technology Inc. PIC10F200/202/204/206 XXX Examples: Pattern a) PIC10F200-I/PG = Industrial temp., PDIP package (Pb-free) b) PIC10F202T-E/OTG = Extended temp., SOT-23 package (Pb-free), Tape and Reel Preliminary . DS41239A-page 85 ...
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... Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Waegenburghtplein 4 NL-5152 JR, Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 05/28/04 2004 Microchip Technology Inc. ...