EZ80L92AZ050SG Zilog, EZ80L92AZ050SG Datasheet - Page 116

IC WEBSERVER 50MHZ 100LQFP

EZ80L92AZ050SG

Manufacturer Part Number
EZ80L92AZ050SG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80L92AZ050SG

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3878
EZ80L92AZ050SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80L92AZ050SG
Manufacturer:
Everlight
Quantity:
12 000
Part Number:
EZ80L92AZ050SG
Manufacturer:
Zilog
Quantity:
10 000
PS013014-0107
Note:
UART Registers
The UARTx_BRG_L registers share the same address space with the UARTx_RBR and
UARTx_THR registers. The UARTx_BRG_H registers share the same address space with
the UARTx_IER registers. Bit 7 of the associated UART Line Control register
(UARTx_LCTL) must be set to 1 to enable access to the BRG registers.
Table 52. UART Baud Rate Generator Registers—Low Byte (UART0_BRG_L =
Table 53. UART Baud Rate Generator Registers—High Byte (UART0_BRG_H =
After a RESET, all UART registers are set to their default values. Any Writes to unused
registers or register bits are ignored and Reads return a value of 0. For compatibility with
future revisions, unused bits within a register must be written with a value of 0. Read/
Bit
Reset
CPU Access
Note: R = Read only; R/W = Read/Write.
Bit
Position
[7:0]
UARTx_BRG_L
Bit
Reset
CPU Access
Note: R = Read only; R/W = Read/Write.
Bit
Position
[7:0]
UARTx_BRG_H
00C1h, UART1_BRG_H = 00D1h)
00C0h, UART1_BRG_L = 00D0h)
00h–FFh These bits represent the High byte of the 16-bit Baud Rate
00h–FFh These bits represent the Low byte of the 16-bit Baud Rate
Value
Value
R/W
R/W
7
0
7
0
Description
Generator divider value. The complete BRG divisor value is
returned by {UARTx_BRG_H, UARTx_BRG_L}.
Description
Generator divider value. The complete BRG divisor value
is returned by {UARTx_BRG_H, UARTx_BRG_L}.
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
Universal Asynchronous Receiver/Transmitter
R/W
R/W
4
0
4
0
R/W
R/W
3
0
3
0
Product Specification
R/W
R/W
2
0
2
0
eZ80L92 MCU
R/W
R/W
1
1
1
0
R/W
R/W
0
0
0
0
110

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