MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 145
MPC8533EVTANG
Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTANG
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Note that individual chapters of this document provide details for each signal, describing each signal’s
behavior when the signal is asserted or negated and when the signal is an input or an output.
The following tables provide summaries of signal functions.
and
number of signals, and whether the signal is an input, output, or bidirectional. The direction of the
multiplexed signals applies for the primary signal function listed in the left-most column of the table for
that row (and does not apply for the state of the reset configuration signals). Finally, the tables provide a
pointer to the table where the signal function is described.
Freescale Semiconductor
PCI_C/BE[3:0]
PCI_AD[31:0]
PCI_DEVSEL
PCI_FRAME
Table 3-2
PCI_IDSEL
MECC[0:7]
MDQS[0:7]
MDQS[0:8]
MODT[0:3]
PCI_STOP
MDQ[0:63]
MCKE[0:3]
PCI_TRDY
MDIC[0:1]
PCI_IRDY
MCK[0:5],
MDM[0:7]
MBA[2:0]
MCS[0:3]
MCK[0:5]
PCI_PAR
MA[15:0]
MDQS8
MDM8
MRAS
MCAS
Name
MWE
lists signals alphabetically. These tables detail the signal name, interface, alternate functions,
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
DDR data
DDR error correcting code
DDR data mask
DDR ECC data mask
DDR data strobe
DDR ECC data strobe
DDR ECC data strobe
(complement)
DDR bank select
DDR address
DDR write enable
DDR row address strobe
DDR column address strobe
DDR chip select (2/DIMM)
DDR clock enable
DDR differential clocks (3
pairs/DIMM)
DRAM On-Die Termination
Driver impedence calibration
PCI address/data
PCI command/byte enable
PCI parity
PCI frame
PCI target ready
PCI initiator ready
PCI stop
PCI device select
PCI initial device select
Table 3-1. MPC8533E Signal Reference by Functional Block
Description
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR memory
DDR me ory
Functional
Debug/
Block
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
Alternate Function(s)
Table 3-1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
lists signals grouped by function,
Signals
No. of
64
16
12
32
8
9
4
2
1
8
1
8
1
3
1
1
1
4
4
4
1
1
1
1
1
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
I
Signal Descriptions
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
17-2/17-6
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
9-3/9-5
Table/
Page
3-5
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