MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 40
MPC8533EVTANG
Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTANG
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
FREESCAL
Quantity:
513
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8533EVTANGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- MPC8533VTALF PDF datasheet
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Paragraph
Number
18.3.10.11
18.3.10.12
18.3.10.13
18.3.10.14
18.3.10.15
18.3.10.16
18.3.10.17
18.3.10.18
18.3.10.19
18.3.10.20
18.4
18.4.1
18.4.1.1
18.4.1.2
18.4.1.2.1
18.4.1.3
18.4.1.4
18.4.1.5
18.4.1.6
18.4.1.7
18.4.1.8
18.4.1.8.1
18.4.1.8.2
18.4.2
18.4.2.1
18.4.2.1.1
18.4.2.1.2
18.4.2.1.3
18.4.2.1.4
18.4.2.2
18.4.2.2.1
18.4.2.2.2
18.4.3
18.4.4
18.4.4.1
18.4.5
18.5
18.5.1
xl
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Functional Description................................................................................................. 18-97
Initialization/Application Information ....................................................................... 18-109
Architecture ............................................................................................................. 18-98
Initial Credit Advertisement .................................................................................. 18-107
Power Management ............................................................................................... 18-108
Hot Reset................................................................................................................ 18-109
Boot Mode and Inbound Configuration Transactions ........................................... 18-109
Interrupts............................................................................................................... 18-106
PCI Express Correctable Error Source ID Register—0x134............................... 18-89
PCI Express Error Source ID Register—0x136 .................................................. 18-89
LTSSM State Status Register—0x404................................................................. 18-90
PCI Express Controller Core Clock Ratio Register—0x440............................... 18-91
PCI Express Power Management Timer Register—0x450 ................................. 18-92
PCI Express PME Time-Out Register (EP-Mode Only)—0x454 ....................... 18-93
PCI Express Subsystem Vendor ID Update Register
Configuration Ready Register—0x4B0............................................................... 18-94
PME_To_Ack Timeout Register (RC-Mode Only)—0x590............................... 18-95
Secondary Status Interrupt Mask Register (RC-Mode Only)—0x5A0............... 18-95
PCI Express Transactions .................................................................................... 18-98
Byte Ordering ...................................................................................................... 18-99
Transaction Ordering Rules ............................................................................... 18-101
Memory Space Addressing................................................................................ 18-101
I/O Space Addressing ........................................................................................ 18-101
Configuration Space Addressing ....................................................................... 18-101
Serialization of Configuration and I/O Writes................................................... 18-102
Messages............................................................................................................ 18-102
EP Interrupt Generation..................................................................................... 18-106
RC Handling of INTx Message and MSI Interrupt ........................................... 18-107
L2/L3 Ready Link State..................................................................................... 18-108
(EP Mode Only)—0x478................................................................................. 18-94
Byte Order for Configuration Transactions ................................................... 18-100
Outbound ATMU Message Generation ......................................................... 18-102
Inbound Messages ......................................................................................... 18-104
Hardware INTx Message Generation ............................................................ 18-106
Hardware MSI Generation............................................................................. 18-106
Software INTx Message Generation ............................................................. 18-106
Software MSI Generation.............................................................................. 18-106
INTx Message Handling................................................................................ 18-107
MSI Handling ................................................................................................ 18-107
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