MC68EN360CAI25L Freescale Semiconductor, MC68EN360CAI25L Datasheet
MC68EN360CAI25L
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MC68EN360CAI25L Summary of contents
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... Freescale Semiconductor Product Brief MC68360 QUad Integrated Communication Controller (QUICC The MC68360 QUad Integrated Communication Controller (QUICC microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities. The QUICC (pronounced “quick”) can be described as a next-generation MC68302 with higher performance in all areas of device operation, increased flexibility, major extensions in capability, and higher integration. The term " ...
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... Freescale Semiconductor, Inc. Memory (SRAM), Electrically Programmable Read-Only Memory (EPROM), Flash EPROM, etc. — Four CAS lines, Four WE lines, One OE line — Boot Chip Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory) — Special Features for MC68040 Including Burst Mode Support • ...
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... Freescale Semiconductor, Inc. • Four SCCs — Ethernet/IEEE 802.3 Optional on SCC1 (Full 10-Mbps Support) (Available only on the MC68EN360) ™ — HDLC/SDLC (All Four Channels Supported at 2 Mbps) — HDLC Bus (Implements an HDLC-Based Local Area Network (LAN)) — AppleTalk ® — Signaling System #7 — ...
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... Freescale Semiconductor, Inc. QUICC ARCHITECTURE OVERVIEW The QUICC is 32-bit controller that is an extension of other members of the Freescale M68300 family. Like other members of the M68300 family, the QUICC incorporates the intermodule bus (IMB). (The MC68302 is an exception, having an M68000 bus on chip.) The IMB provides a common interface for all modules of the M68300 family, which allows Freescale to develop new devices more quickly by using the library of existing modules ...
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... Freescale Semiconductor, Inc. fetch two word-length instructions in one bus cycle, filling the internal instruction queue more quickly. The CPU32+ core can also read and write 32-bits of data in one bus cycle. Although the CPU32+ instruction timings are improved, its instruction set is identical to that of the CPU32. It will also execute the entire M68000 instruction set ...
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... Freescale Semiconductor, Inc. The four general-purpose timers on the QUICC are functionally similar to the two general-purpose timers found on the MC68302. However, they offer some minor enhancements, such as the internal cascading of two timers to form a 32-bit timer. The QUICC also contains a periodic interval timer in the SIM60, bringing the total to five on-chip timers ...
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... Freescale Semiconductor, Inc. offers many more functions than even a 240-pin package would normally allow, resulting in more multifunctional pins than the MC68302. Software Compatibility Issues The following list summarizes the major software differences between the MC68302 and the QUICC: • Since the CPU32 superset of the M68000 instruction set, all previously written code will run. ...
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... Freescale Semiconductor, Inc. QUICC MC68360 ADDRESS CAS3–CAS0 PRTY3–PRTY0 Figure 2. Minimum QUICC System Configuration Figure 3 shows a larger system configuration. This system offers one EPROM, one flash EPROM, and supports two DRAM SIMMs. Depending on the capacitance on the system bus, external buffers may be required ...
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... Freescale Semiconductor, Inc. QUICC MC68360 CS0 OE WE0 DATA ADDRESS CS7 WE3–WE0 RAS2 RAS1 CAS3–CAS0 R/W PRTY3–PRTY0 Figure 3. Larger QUICC System Configuration QUICC Serial Configurations The QUICC offers an extremely flexible set of communications capabilities. Although a full understanding of For More Information On This Product, ...
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... Freescale Semiconductor, Inc. Figure 4. Ethernet LAN Capability Figure 5 shows how up to six of the serial channels can connect to a TDM interface. The QUICC provides a built-in time-slot assigner for access to the TDM time slots. Other channels can work with their own set of pins, allowing possibilities like an Ethernet to T1 bridge, etc. ...
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... Freescale Semiconductor, Inc. SCC SCC SCC SCC SMC SMC ANY COMBINATION OF SCCs CONNECTED TO ANY TDM. NOTE: Two TDM buses may be simultaneously supported Figure 6. Dual TDM Bus Implementation QUICC Serial Configuration Examples Figure 7 shows a general-purpose application that includes Ethernet, AppleTalk, an HDLC connection line, an HDLC connection to frame relay, a UART debug monitor port, a totally transparent data stream port, and an SPI connection to a serial EEPROM ...
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... Freescale Semiconductor, Inc. QUICC MASTER CPU32+ Figure 8. Master-Slave QUICC Implementation The QUICC has special features in slave mode to support the M68040 family. When the QUICC is used in this way said MC68040 companion mode. Figure 9 shows how a QUICC in slave mode can interface to a MC68EC040. (The MC68EC040 is a low-cost version of the MC68040 with identical integer performance, but without the memory management unit (MMU) and the floating-point unit (FPU) ...
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... Freescale Semiconductor, Inc. MC68EC040 SYSTEM BUS CONTROL Figure 9. MC68040 Companion Mode For More Information On This Product, Go to: www.freescale.com QUICC SLAVE MC68EC040 SUPPORT FUNCTIONS CPU32+ SCC SCC SCC SCC SMC SMC MEMORY SPI CONTROLLER EPROM DRAM ADDRESS MUXs SRAM ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...