MC68040FE33A Freescale Semiconductor, MC68040FE33A Datasheet - Page 270

IC MICROPROCESSOR 32BIT 184-CQFP

MC68040FE33A

Manufacturer Part Number
MC68040FE33A
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68040FE33A

Processor Type
M680x0 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Package
184CQFP
Processor Series
M680xx
Core
CPU32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68040FE33A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
If a floating-point exception is pending from a previous floating-point instruction, a pre-
instruction exception is taken. After the appropriate exception handler is executed, the
conditional instruction is restarted. When the FPU pipeline is idle (all previous floating-
point instructions have completed) and no exceptions are pending, the processor
evaluates the conditional predicate and checks for a BSUN exception before executing the
conditional instruction.
9.7.1.1 MASKABLE EXCEPTION CONDITIONS. A BSUN exception occurs if the
conditional predicate is one of the IEEE nonaware branches and the FPCC NAN bit is set.
When the processor detects this condition, it sets the BSUN bit in the FPSR EXC byte.
For MC68881/MC68882 compatibility, the M68040FPSP updates the FPIAR by copying
the PC value in the pre-instruction stack frame to the FPIAR. The M68040FPSP BSUN
exception handler restores the FPU to its exceptional state, cleans up the stack to the
state prior to the M68040FPSP BSUN exception handler’s execution, and continues
instruction execution at the user BSUN exception handler. No parameters are passed to
the user BSUN exception handler since the M68040FPSP BSUN exception handler
provides the illusion that it never existed.
The user BSUN exception handler must execute an FSAVE as its first floating-point
instruction. FSAVE allows other floating-point instructions to execute without reporting the
BSUN exception again, although none of the state frame values are useful in the
execution of the user BSUN exception handler. The BSUN exception is unique in that the
exception is taken before the conditional predicate is evaluated. If the user BSUN
exception handler does not set the PC to the instruction following the one that caused
BSUN exception when returning, the exception is executed again. Therefore, it is the
responsibility of the user BSUN exception handler to prevent the conditional instruction
from taking the BSUN exception again. There are four ways to prevent taking the
exception again:
9-26
a. If the user BSUN exception handler is disabled, the floating-point condition is
b. If the user BSUN exception handler is enabled, the processor takes a floating-point
1. Incrementing the stored PC in the stack bypasses the conditional instruction. This
2. Clearing the NAN bit prevents the exception from being taken again. However, this
3. Disabling the BSUN bit also prevents the exception from being taken again. Like the
evaluated as if it were the equivalent IEEE aware conditional predicate. No
exceptions are taken.
pre-instruction exception. A $0 stack frame is saved, and vector number 48 is
generated to access the BSUN exception vector. The BSUN entry in the processor’s
vector table points to the M68040FPSP BSUN exception handler.
technique applies to situations where a fall-through is desired. Note that accurate
calculation of the PC increment requires detailed knowledge of the size of the
conditional instruction being bypassed.
alone cannot deterministically control the result’s indication (true or false) that would
be returned when the conditional instruction reexecutes.
second method, this method cannot control the result indication (true or false) that
would be returned when the conditional instruction reexecutes.
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
MOTOROLA

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