MC68LC060ZU66 Freescale Semiconductor, MC68LC060ZU66 Datasheet - Page 261
MC68LC060ZU66
Manufacturer Part Number
MC68LC060ZU66
Description
IC MPU 32BIT 68K 66MHZ 304-TBGA
Manufacturer
Freescale Semiconductor
Specifications of MC68LC060ZU66
Processor Type
M680x0 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
304-TBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
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8.4.7 Branch Prediction Error
A branch prediction error occurs when a taken branch instruction is executed creating a
branch cache entry and then this same code is re-executed with the former branch instruc-
tion now appearing as an extension word for another opcode.In this type of sequence where
the interpretation of the code stream is dynamically changed, a branch prediction error may
occur.
In the past, Motorola had suggested using a TRAPF (word or long) instruction to remove a
branch in the following construct:
label1:
label2:
where a TRAPF (word or long) can be substituted for the branch instruction and the subse-
quent instruction, <op1> instruction effectively appears as the extension word of the TRAPF.
The BPE bit of the FSLW can be asserted if the <op1> instruction is a taken branch instruc-
tion, but the likelihood of this usage is expected to be very low. The replacement of branch
instructions using this TRAPF construct is still recommended for cases where <op1> is not
a branch instruction. It is the responsibility of the access error handler to test the BPE bit,
and if asserted, clear the branch cache. Refer to 8.4.5 Recovering from an Access Error
for details on how to recover from this error.
MOTOROLA
bra
<op1>
<op2>
label2
M68060 USER’S MANUAL
Exception Processing
8-29
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