GD80960JA33 Intel, GD80960JA33 Datasheet - Page 69

• Manufacturer Part Number: GD80960JA33
• Description: IC MPU I960JA 3V 33MHZ 196-BGA
• Manufacturer: Intel

Specifications of GD80960JA33

• Rohs Status: RoHS non-compliant
• Processor Type: i960
• Features: JA suffix, 32-Bit, 2K Cache
• Speed: 33MHz
• Voltage: 3V
• Mounting Type: Surface Mount
• Package / Case: 196-BGA
• Family Name: i960
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.45V
• Operating Supply Voltage (min): 3.15V
• Operating Temp Range: 0C to 100C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: Mini-BGA
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 820063

7.0
Datasheet
Figure 42. Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus
Bus Functional Waveforms
Figure 42
arbitration sequence.
applied to the device.
operation.
the device.
summarize all possible combinations of bus accesses across 8-, 16-, and 32-bit buses according to
data alignment.
RDYRCV#
WIDTH1:0
through
Figure 51
BLAST#
Figure 53
AD31:0
BE3:0#
CLKIN
DT/R#
ADS#
DEN#
W/R#
D/C#
A3:2
ALE
Figure 47
illustrates the processor ONCE# sequence from the time power is applied to
Figure 49
and
Figure 50
80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
T
Figure 54
ADDR
a
illustrate typical 80960Jx bus transactions.
T
10
d
illustrates the processor reset sequence from the time power is
illustrates the processor reset sequence when the processor is in
D
In
T
also show accesses on 32-bit buses.
r
T
i
Invalid
T
i
T
ADDR
a
T
10
d
T
DATA Out
r
T
i
Table 44
Figure 48
T
i
through
F_JF030A
depicts the bus
Table 46
69