MC68360RC25K Freescale Semiconductor, MC68360RC25K Datasheet - Page 539
MC68360RC25K
Manufacturer Part Number
MC68360RC25K
Description
IC MPU QUICC 25MHZ 241-PGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360RC25K
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
241-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
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BR—BCS Reset
TD—Transmit DLE
TR—Transparent Mode
B—BCS Enable
The following status bits are written by the CP after it has finished transmitting the associ-
ated data buffer.
UN—Underrun
CT—CTS Lost
Data Length
The BISYNC controller encountered a transmitter underrun condition while transmitting
the associated data buffer.
CTS was lost during message transmission.
The data length is the number of octets that the CP should transmit from this BD’s data
buffer. It is never modified by the CP. The data length should be greater than zero.
0 = The transmitter BCS accumulation is not reset.
1 = The transmitter BCS accumulation is reset (used for STX or SOH) before sending
0 = No automatic DLE transmission is to occur before the data buffer.
1 = The transmitter will transmit a DLE character before sending the data buffer, which
0 = The transmitter will enter (remain in) the normal mode after sending the data buffer.
1 = The transmitter enters or remains in transparent mode after sending the data buff-
0 = Buffer consists of characters to be excluded from the BCS accumulation.
1 = Buffer consists of characters to be included in the BCS accumulation.
However, the R-bit will be cleared if an error occurs during transmission, regard-
less of the CM bit.
the data buffer.
saves writing the first DLE to a separate data buffer when working in transparent
mode. See the TR bit for information on control characters.
In this mode, the transmitter will automatically insert SYNCs in an underrun condi-
tion.
er. In this mode, the transmitter automatically inserts DLE-SYNC pairs in the un-
derrun condition. Underrun occurs when the BISYNC controller finishes a buffer
with the L-bit set to zero and the next BD is not available. The transmitter also
checks all characters before sending them; if a DLE is detected, another DLE is
automatically sent. The user must insert a DLE or program the BISYNC controller
to insert it (using TD) before each control character required. The transmitter will
calculate the CRC16 BCS even if the BCS bit in the BISYNC mode register is pro-
grammed to LRC. The PTCRC should be initialized to CRC16 before setting this
bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
Serial Communication Controllers (SCCs)
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