MC68020RC16E Freescale Semiconductor, MC68020RC16E Datasheet - Page 7
MC68020RC16E
Manufacturer Part Number
MC68020RC16E
Description
IC MPU 32BIT 16MHZ 114-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68020EH16E.pdf
(306 pages)
Specifications of MC68020RC16E
Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
114-PGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16.67MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
114
Package Type
CPGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68020RC16E
Manufacturer:
MOT
Quantity:
900
Company:
Part Number:
MC68020RC16E
Manufacturer:
MOT
Quantity:
900
Part Number:
MC68020RC16E
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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Paragraph
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10
7.3.11
7.4
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.4.9
7.4.10
7.4.11
7.4.12
7.4.13
7.4.14
7.4.15
7.4.16
7.4.17
7.4.18
7.4.19
7.4.20
7.5
7.5.1
7.5.1.1
7.5.1.2
7.5.1.3
7.5.1.4
7.5.1.5
7.5.2
7.5.2.1
7.5.2.2
MOTOROLA
Number
Coprocessor Response Primitives .......................................................... 7-27
Exceptions ............................................................................................... 7-49
Response CIR ..................................................................................... 7-24
Restore CIR ......................................................................................... 7-25
Operation Word CIR ............................................................................ 7-25
Command CIR ..................................................................................... 7-25
Operand CIR ....................................................................................... 7-26
Register Select CIR ............................................................................. 7-27
Instruction Address CIR ....................................................................... 7-27
Operand Address CIR ......................................................................... 7-27
ScanPC ............................................................................................... 7-28
Coprocessor Response Primitive General Format .............................. 7-28
Supervisor Check Primitive ................................................................. 7-33
Transfer Operation Word Primitive ...................................................... 7-33
Transfer from Instruction Stream Primitive .......................................... 7-34
Evaluate and Transfer Effective Address Primitive ............................. 7-35
Evaluate Effective Address and Transfer Data Primitive ..................... 7-35
Write to Previously Evaluated Effective Address Primitive .................. 7-37
Take Address and Transfer Data Primitive.......................................... 7-39
Transfer to/from Top of Stack Primitive ............................................... 7-40
Transfer Single Main Processor Register Primitive ............................. 7-40
Transfer Main Processor Control Register Primitive ........................... 7-41
Transfer Multiple Main Processor Registers Primitive ......................... 7-42
Transfer Multiple Coprocessor Registers Primitive ............................. 7-42
Transfer Status Register and ScanPC Primitive.................................. 7-44
Take Preinstruction Exception Primitive .............................................. 7-45
Take Midinstruction Exception Primitive .............................................. 7-47
Take Postinstruction Exception Primitive ............................................ 7-48
Coprocessor-Detected Exceptions ...................................................... 7-49
Main-Processor-Detected Exceptions ................................................. 7-52
Control CIR .......................................................................................... 7-24
Save CIR ............................................................................................. 7-25
Condition CIR ...................................................................................... 7-26
Busy Primitive ...................................................................................... 7-30
Null Primitive ........................................................................................ 7-31
TABLE OF CONTENTS (Continued)
Coprocessor-Detected Protocol Violations ...................................... 7-50
Coprocessor-Detected Illegal Command or Condition Words ......... 7-51
Coprocessor Data-Processing-Related Exceptions ......................... 7-51
Coprocessor System-Related Exceptions ....................................... 7-51
Protocol Violations ........................................................................... 7-52
F-Line Emulator Exceptions ............................................................. 7-54
Format Errors ................................................................................... 7-52
Freescale Semiconductor, Inc.
For More Information On This Product,
SECTION 1: OVERVIEW
Go to: www.freescale.com
M68020 USER’S MANUAL
Title
UM Rev 1
Number
Page
xi
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