MC68360ZP25L Freescale Semiconductor, MC68360ZP25L Datasheet - Page 939
MC68360ZP25L
Manufacturer Part Number
MC68360ZP25L
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360ZP25L
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
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D.2.7 Performance
The QUICC32 with the QMC protocol is designed to handle data rates from 8 kbps to 2.048
Mbps.
The QMC can support up to 32 channels.
These are the outer boundaries. The user is free to program channel routing in the QMC and
the SI RAM to create any other TDM system.
Beside the support for QMC, the remaining SCC channels in the QUICC32 can, in the 25
MHz version, support a data rate of 64 kbps each with any protocol framework. These
remaining channels can be used independently or also multiplexed through the SI RAM.
The 33 MHz version of QUICC32 can support one Ethernet channel with 32 QMC channels.
A more detailed performance table will be provided at a later date.
CHANNEL j PARAMETER
PARAMETER
RAM PAGE 1
PARAMETER
RAM PAGE 2
PARAMETER
RAM PAGE 3
PARAMETER
RAM PAGE 4
CHANNEL 0 PARAMETER
CHANNEL 1 PARAMETER
Freescale Semiconductor, Inc.
For More Information On This Product,
MCBASE
TBASE
RBASE
Figure D-6. FQMC Memory Map
DPR
MC68360 USER’S MANUAL
Go to: www.freescale.com
MEMORY STRUCTURE FOR MULTICHANNEL CONTROLLER
EXTERNAL MEMORY
CHANNEL j Tx BD
CHANNEL j Rx BD
TABLE
TABLE
MC68MH360 Product Brief
64K
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