AD51/067ARMZ-2RL ON Semiconductor, AD51/067ARMZ-2RL Datasheet - Page 13
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AD51/067ARMZ-2RL
Manufacturer Part Number
AD51/067ARMZ-2RL
Description
Board Mount Temperature Sensors TEMP MONITR DUAL CHN W/SERIES RSTNCE CNCL
Manufacturer
ON Semiconductor
Datasheet
1.AD51067ARMZ-2RL.pdf
(20 pages)
Specifications of AD51/067ARMZ-2RL
Full Temp Accuracy
+/- 1 C, +/- 3 C
Package / Case
MSOP
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 127 C
Minimum Operating Temperature
0 C
Output Type
Digital
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD51/067ARMZ-2RL
Manufacturer:
FUJISU
Quantity:
5 000
serial bus in one operation, but it is not possible to mix read
Figure 16. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
Any number of bytes of data may be transferred over the
3. When all data bytes have been read or written,
high period, since a low-to-high transition when
the clock is high may be interpreted as a stop
signal. The number of data bytes that can be
transmitted over the serial bus in a single read or
write operation is limited only by what the master
and slave devices can handle.
stop conditions are established. In write mode, the
master pulls the data line high during the tenth
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as a no acknowledge. The master
then takes the data line low during the low period
before the tenth clock pulse, then high during the
tenth clock pulse to assert a stop condition.
SDATA
SCLK
SDATA
SCLK
START BY
START BY
MASTER
MASTER
SDATA
SCLK
A6
A6
1
1
START BY
MASTER
A5
A5
Figure 18. Reading from a Previously Selected Register
Figure 17. Writing to the Address Pointer Register Only
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
A4
A6
A4
1
A3
A5
A3
FRAME 1
FRAME 1
SERIAL BUS ADDRESS BYTE
A4
A2
A2
FRAME 1
A3
A1
A1
SDATA (CONTINUED)
SCLK (CONTINUED)
http://onsemi.com
A2
A0
A0
A1
R/W
R/W
13
ADT7461
ACK. BY
ADT7461
ACK. BY
A0
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation. With the
ADT7461, write operations contain either one or two bytes,
while read operations contain one byte.
data from it, the address pointer register must be set so that
the correct data register is addressed. The first byte of a write
operation always contains a valid address that is stored in the
address pointer register. If data is to be written to the device,
the write operation contains a second data byte that is written
to the register selected by the address pointer register.
over the bus followed by R/W set to 0. This is followed by two
data bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register. The examples shown in Figure 16 to
Figure 18 use the ADT7461 SMBus Address 0x4C.
9
9
To write data to one of the device data registers or to read
This is illustrated in Figure 16. The device address is sent
R/W
D7
ADT7461
ACK. BY
D7
1
1
D7
1
9
D6
D6
D7
D6
ADDRESS POINTER REGISTER BYTE
1
D5
D5
DATA BYTE FROM ADT7461
D6
D5
ADDRESS POINTER REGISTER BYTE
D4
D4
D5
D4
FRAME 2
FRAME 2
DATA BYTE
FRAME 3
D3
D3
D4
D3
FRAME 2
D2
D2
D3
D2
D1
D1
D2
D1
D0
D0
D0
D1
ADT7461
ACK. BY
NACK. BY
ADT7461
ACK. BY
MASTER
D0
9
9
9
ACK. BY
ADT7461
9
STOP BY
MASTER
STOP BY
STOP BY
MASTER
MASTER