ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 10

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
Table 2.
ISP1362_5
Product data sheet
Symbol
DREQ2
V
DGND
DACK1
DACK2
INT1
INT2
RESET
H_SUSPEND/
H_WAKEUP
D_SUSPEND/
D_WAKEUP
CC
[1]
Pin description
Pin
LQFP64
25
26
27
28
29
30
31
32
33
34
TFBGA64
K6
J7
K7
J8
K8
J9
K9
K10
J10
H9
…continued
Type
O
-
-
I
I
O
O
I
I/O
I/O
Description
DMA request output; when active, it signals the DMA controller that a
data transfer is requested by the Peripheral Controller; the active level
(HIGH or LOW) of the request is programmed by using the
DcHardwareConfiguration register (BAh/BBh)
push-pull output
supply voltage (3.3 V); it is recommended that you connect a decoupling
capacitor of 0.01 F
digital ground
DMA acknowledge input; indicates that a request for DMA transfer from
the Host Controller has been granted by the DMA controller; the active
level (HIGH or LOW) of the acknowledge signal is programmed by using
the HcHardwareConfiguration register (20h/A0h); when not in use, this
pin must be connected to V
input with hysteresis
DMA acknowledge input; indicates that a request for DMA transfer from
the Peripheral Controller has been granted by the DMA controller; the
active level (HIGH or LOW) of the acknowledge signal is programmed by
using the DcHardwareConfiguration register (BAh/BBh); when not in use,
this pin must be connected to V
input with hysteresis
interrupt request from the Host Controller; provides a mechanism for the
Host Controller to interrupt the microprocessor; for details, see
HcHardwareConfiguration register (20h/A0h)
If the OneINT bit of the HcHardwareConfiguration register is set to
logic 1, both the Host Controller and the Peripheral Controller interrupt
request will be routed to INT1.
push-pull output
interrupt request from the Peripheral Controller; provides a mechanism
for the Peripheral Controller to interrupt the microprocessor; for details,
see DcHardwareConfiguration register (BAh/BBh)
push-pull output
reset input
input with hysteresis and internal pull-up resistor
I/O pin (open-drain); goes HIGH when the Host Controller is in suspend
mode; a LOW pulse must be applied to this pin to wake up the Host
Controller; connect a 100 k resistor to V
bidirectional, push-pull input, 3-state open-drain output
I/O pin (open-drain); goes HIGH when the Peripheral Controller is in
suspend mode; a LOW pulse must be applied to this pin to wake up the
Peripheral Controller; connect a 100 k resistor to V
bidirectional, push-pull input, 3-state open-drain output
Rev. 05 — 8 May 2007
CC
through a 10 k resistor
CC
through a 10 k resistor
Single-chip USB OTG Controller
CC
Section 14.4.1
Section 15.1.4
CC
© NXP B.V. 2007. All rights reserved.
ISP1362
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