ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 103

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
Table 95.
Table 96.
ISP1362_5
Product data sheet
Bit
15 to 0
Bit
15 to 0
Symbol
ATLBufferSize[15:0]
HcATLBufferSize register: bit description
HcATLBufferPort register: bit description
Symbol
DataWord[15:0] R/W
14.9.1 HcATLBufferSize register (R/W: 34h/B4h)
14.9.2 HcATLBufferPort register (R/W: 44h/C4h)
14.9.3 HcATLBlkSize register (R/W: 54h/D4h)
14.9 Control and bulk transfer (aperiodic transfer) registers
Table 94.
This register allows you to allocate the size of the ATL buffer to be used for aperiodic
transactions. The default value of the buffer size is set to 512 bytes, and the maximum
allowable allocated size is 4096 bytes. The bit description of the register is given in
Table
Code (Hex): 34 — read
Code (Hex): B4 — write
In addition to the HcDirectAddressData register, the ISP1362 provides this register to act
as another data port to access the ATL buffer. The starting address to access the buffer is
always fixed at 0000h. Therefore, random access of the ATL buffer is not allowed. The bit
description of the HcATLBufferPort register is given in
Code (Hex): 44 — read
Code (Hex): C4 — write
The HCD is first required to initialize the HcTransferCounter register with the byte count to
be transferred and check the HcBufferStatus register. The HCD then sends the command
(44h to read from the ATL buffer, and C4h to write to the ATL buffer) to the Host Controller
through the I/O port of the microprocessor. After the command is sent, the HCD starts
reading data from the ATL buffer or writing data to the ATL buffer. While the HCD is
accessing the buffer, the buffer pointer of ATL also automatically increases. When the
pointer has reached the initialized byte count of the HcTransferCounter register, the Host
Controller sets the AllEOTInterrupt bit of the Hc PInterrupt register to logic 1 and updates
the HcBufferStatus register.
The ISP1362 partitions the ATL buffer into several equal sized blocks so that the Host
Controller can skip the current PTD and proceed to process the next PTD easily. The
block size of the ATL buffer must be specified in this register and must be a multiple of
8 bytes. The bit allocation of the HcATLBlkSize register is given in
Bit
15 to 5
4 to 0
Access
95.
Access
R/W
HcINTLCurrentActivePTD register: bit description
Symbol
-
ActivePTD[4:0]
Value
0200h
Value
0000h
Rev. 05 — 8 May 2007
Description
The size of the buffer to be used for aperiodic transactions and must
be specified in bytes.
Description
The data of the ATL buffer to be accessed through this data port.
Description
reserved
This 5-bit number represents the PTD that is currently active.
Table
Single-chip USB OTG Controller
96.
Table
© NXP B.V. 2007. All rights reserved.
ISP1362
97.
102 of 152