ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 150

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
28. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10. Microprocessor access to the Host Controller
Fig 11. Access to internal control registers . . . . . . . . . . .21
Fig 12. PIO register access . . . . . . . . . . . . . . . . . . . . . . .21
Fig 13. PIO access for a 16-bit or 32-bit register . . . . . . .22
Fig 14. HC and OTG interrupt logic . . . . . . . . . . . . . . . . .27
Fig 15. Internal power-on reset timing . . . . . . . . . . . . . . .30
Fig 16. Clock with respect to the external
Fig 17. HNP sequence of events . . . . . . . . . . . . . . . . . . .33
Fig 18. Dual-role A-device state diagram. . . . . . . . . . . . .35
Fig 19. Dual-role B-device state diagram. . . . . . . . . . . . .36
Fig 20. External capacitors connection . . . . . . . . . . . . . .38
Fig 21. USB Host Controller states of the ISP1362 . . . . .39
Fig 22. PTD data stored in the buffer memory. . . . . . . . .41
Fig 23. Using internal overcurrent detection circuit . . . . .47
Fig 24. Using external overcurrent detection circuit . . . . .48
Fig 25. Using internal charge pump. . . . . . . . . . . . . . . . .48
Fig 26. Peripheral Controller in 8327 compatible
Fig 27. Suspend and resume timing . . . . . . . . . . . . . . . .59
Fig 28. Efficiency as a function of load current . . . . . . .127
Fig 29. Output voltage as a function of load current . . .128
Fig 30. Host Controller programmed interface timing . .131
Fig 31. Peripheral Controller programmed interface
Fig 32. Peripheral Controller programmed interface
Fig 33. Host Controller single-cycle DMA timing . . . . . .134
Fig 34. Host Controller burst mode DMA timing . . . . . .135
Fig 35. Peripheral Controller single-cycle DMA timing
Fig 36. Peripheral Controller single-cycle DMA read
ISP1362_5
Product data sheet
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin configuration LQFP64 . . . . . . . . . . . . . . . . . . .6
Pin configuration TFBGA64 . . . . . . . . . . . . . . . . . .6
Recommended values of the ISP1362 buffer
memory allocation . . . . . . . . . . . . . . . . . . . . . . . .15
A sample snapshot of the ATL or INTL memory
management scheme . . . . . . . . . . . . . . . . . . . . .16
A sample snapshot of the ISTL memory
management scheme . . . . . . . . . . . . . . . . . . . . .17
Peripheral Controller buffer memory
organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
PIO interface between a microprocessor
and the ISP1362 . . . . . . . . . . . . . . . . . . . . . . . . .19
DMA interface between a microprocessor
and the ISP1362 . . . . . . . . . . . . . . . . . . . . . . . . .19
or the Peripheral Controller . . . . . . . . . . . . . . . . .20
power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . .30
DMA mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
read timing (I/O and 8237 compatible DMA) . . .132
write timing (I/O and 8237 compatible DMA) . . .133
(8237 mode). . . . . . . . . . . . . . . . . . . . . . . . . . . .135
Rev. 05 — 8 May 2007
Fig 37. Peripheral Controller single-cycle DMA
Fig 38. Peripheral Controller burst mode DMA timing . . 137
Fig 39. Package outline SOT314-2 (LQFP64). . . . . . . . 138
Fig 40. Package outline SOT543-1 (TFBGA64) . . . . . . 139
Fig 41. Temperature profiles for large and small
timing in DACK-only mode . . . . . . . . . . . . . . . . 136
write timing in DACK-only mode . . . . . . . . . . . . 136
components. . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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