ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 20

IC USB OTG CONTROLLER 64-LQFP

ISP1362BDFA

Manufacturer Part Number
ISP1362BDFA
Description
IC USB OTG CONTROLLER 64-LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362BDFA

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
568-1219
ISP1362BD,151
ISP1362BD-S

Available stocks

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Part Number
Manufacturer
Quantity
Price
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ISP1362BDFA
Manufacturer:
STE
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Part Number:
ISP1362BDFA
Manufacturer:
ST-Ericsson Inc
Quantity:
10 000
NXP Semiconductors
ISP1362_5
Product data sheet
8.3 DMA mode
The ISP1362 also provides DMA mode for external microprocessors to access the
internal buffer memory of the ISP1362. The DMA operation enables data to be transferred
between the system memory of a microprocessor and the internal buffer memory of the
ISP1362.
Remark: The DMA operation must be controlled by the DMA controller of the external
microprocessor system (master).
microprocessor system and the ISP1362.
The ISP1362 provides two DMA channels. DMA channel 1 (controlled by the DREQ1 and
DACK1 signals) is for the DMA transfer between the system memory of a microprocessor
and the internal buffer memory of the ISP1362 Host Controller. DMA channel 2 (controlled
by the DREQ2 and DACK2 signals) is for the DMA transfer between the system memory
of a microprocessor and the internal buffer memory of the ISP1362 Peripheral Controller.
The ISP1362 provides an internal End-Of-Transfer (EOT) signal to terminate the DMA
transfer.
Fig 8. PIO interface between a microprocessor and the ISP1362
Fig 9. DMA interface between a microprocessor and the ISP1362
PROCESSOR
PROCESSOR
MICRO-
MICRO-
Rev. 05 — 8 May 2007
D [ 15:0 ]
DREQ1
DREQ2
DACK1
DACK2
D [ 15:0 ]
IRQ1
IRQ2
Figure 9
WR
RD
CS
WR
A2
A1
RD
microprocessor
microprocessor
bus interface
bus interface
shows the DMA interface between a
Single-chip USB OTG Controller
D [ 15:0 ]
RD
WR
DACK1
DREQ1
DACK2
DREQ2
D [ 15:0 ]
RD
WR
CS
A1
A0
INT1
INT2
ISP1362
ISP1362
004aaa042
004aaa043
© NXP B.V. 2007. All rights reserved.
ISP1362
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