ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 3

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
3. Applications
ISP1362_5
Product data sheet
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The ISP1362 can be used to implement a dual-role USB device in any application, USB
host or USB peripheral, depending on the cable connection. If the dual-role device is
connected to a typical USB peripheral, it behaves like a typical USB host. The dual-role
device, however, can also be connected to a PC or any other USB host and behave like a
typical USB peripheral.
USB device:
Supports two USB ports: port 1 and port 2
Supports software-controlled connection to the USB bus (SoftConnect)
Supports good USB connection indicator that blinks with traffic (GoodLink)
Complies with USB power management requirements
Supports internal power-on and low-voltage reset circuit, with possibility of a software
reset
High-speed parallel interface to most CPUs available in the market, such as Hitachi
SH-3, Intel StrongARM, NXP XA, Fujitsu SPARClite, NEC and Toshiba MIPS, ARM7/9,
Freescale DragonBall and PowerPC Reduced Instruction Set Computer (RISC):
Supports Programmed I/O (PIO) or DMA
Supports ‘suspend’ and remote wake-up
Uses 12 MHz crystal or direct clock source with on-chip Phase-Locked Loop (PLL) for
low ElectroMagnetic Interference (EMI)
Operates at 3.3 V power supply
Operating temperature range from 40 C to +85 C
Available in 64-pin LQFP and TFBGA packages
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Supports integrated physical 4096 bytes of multiconfiguration memory
Supports all four types of USB transfers: control, bulk, interrupt and isochronous
Supports multiframe buffering for isochronous transfer
Supports automatic interrupt polling rate mechanism
Supports paired buffering for bulk transfer
Directly addressable memory architecture; memory can be updated on-the-fly
Supports high performance USB interface device with integrated Serial Interface
Engine (SIE), buffer memory and transceiver
Supports fully autonomous and multiconfiguration Direct Memory Access (DMA)
operation
Supports up to 14 programmable USB endpoints with two fixed control IN/OUT
endpoints
Supports integrated physical 2462 bytes of multiconfiguration memory
Supports endpoints with double buffering to increase throughput and ease
real-time data transfer
Supports controllable LazyClock (110 kHz
Port 1 can be configured to function as a downstream port, an upstream port or an
OTG port
Port 2 can be used only as a downstream port
16-bit data bus
10 MB/s data transfer rate between the microprocessor and the ISP1362
Rev. 05 — 8 May 2007
50 %) output during ‘suspend’
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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