ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 40

IC USB OTG CONTROLLER 64-LQFP

ISP1362BDFA

Manufacturer Part Number
ISP1362BDFA
Description
IC USB OTG CONTROLLER 64-LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362BDFA

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
568-1219
ISP1362BD,151
ISP1362BD-S

Available stocks

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Price
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Manufacturer:
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NXP Semiconductors
ISP1362_5
Product data sheet
Fig 21. USB Host Controller states of the ISP1362
USBOperational write
11.2 USB traffic generation
The USB states are reflected in the HostControllerFunctionalState (HCFS) field of the
HcControl register. The HCD is allowed to perform only USB state transitions shown in
Figure
USB traffic can be generated only when the ISP1362 USB Host Controller is under the
USBOperational state. Therefore, the HCD must set the ISP1362 USB HC in the
USBOperational state. This is done by setting the HCFS field of the HcControl register
before generating USB traffic.
A brief flow of the USB traffic generation is described as follows:
1. Reset the ISP1362 by using the RESET pin or the software reset.
2. Set the physical size of the ATL, interrupt, ISTL0 and ISTL1 buffers.
3. Write 32-bit hexadecimal value 8000 00FDh to the HcInterruptEnable register. This
4. Write 16-bit hexadecimal value 002Dh to the HcHardwareConfiguration register. This
5. Write 0500 0B02h to HcRhDescriptorA and 0000 0000h to HcRhDescriptorB.
6. Write 16-bit hexadecimal value 0680h to the HcControl register to set the ISP1362
7. Read the HcRhPortStatus[1] and HcRhPortStatus[2] registers. These registers
8. Connect a full-speed device to one of the downstream ports or use a 1.5 k resistor
USBSuspend write
will enable all the interrupt events in the register to trigger the hardware interrupt (see
Section
will set up the Host Controller to level triggered and active HIGH interrupt setting (see
Section
into operation mode (see
contain 32-bit hexadecimal value 0001 0100h (see
to pull up the DP line (to emulate a full-speed device).
21.
USBOperational
USBSuspend
14.1.5).
14.4.1).
Rev. 05 — 8 May 2007
USBResume write
remote wake-up
Section
USBResume
or
USBOperational write
14.1.2).
USBReset write
USBReset write
USBReset write
Single-chip USB OTG Controller
Section
hardware or software
14.3.4).
USBReset
reset
© NXP B.V. 2007. All rights reserved.
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