ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 81

IC USB OTG CONTROLLER 64-LQFP

ISP1362BDFA

Manufacturer Part Number
ISP1362BDFA
Description
IC USB OTG CONTROLLER 64-LQFP
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362BDFA

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
568-1219
ISP1362BD,151
ISP1362BD-S

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
STE
Quantity:
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Part Number:
ISP1362BDFA
Manufacturer:
ST-Ericsson Inc
Quantity:
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NXP Semiconductors
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
14.3.1 HcRhDescriptorA register (R/W: 12h/92h)
14.3 HC root hub registers
R/W
15
7
0
-
-
Table 54.
All registers included in this partition are dedicated to the USB root hub, which is an
integral part of the Host Controller although it is functionally a separate entity. The HCD
emulates USB Driver (USBD) accesses to the root hub by using a register interface. The
HCD maintains many USB-defined hub features that are not required to be supported in
hardware. For example, the hub’s device, configuration, interface and endpoint descriptors
are maintained only in the HCD, as well as some static fields of the class descriptor. The
HCD also maintains and decodes the address of the root hub device and other trivial
operations that are better suited to software than to hardware.
Root hub registers are developed to maintain the similarity of bit organization and
operation to typical hubs found in the system.
Four registers are defined as follows:
Each register is read and written as a double word. These registers are only written during
initialization to correspond with the system implementation. The HcRhDescriptorA and
HcRhDescriptorB registers can be read or written, regardless of the USB states of the
Host Controller. You can write to HcRhStatus and HcRhPortStatus only when the Host
Controller is in the USBOperational state.
The HcRhDescriptorA register is the first of two registers describing the characteristics of
the root hub. The bit allocation is given in
Code (Hex): 12 — read
Bit
31 to 11
10 to 0
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1:NDP]
R/W
14
6
0
-
-
Symbol
-
LST[10:0]
HcLSThreshold register: bit description
reserved
R/W
13
5
1
-
-
Description
reserved
LSThreshold: Contains a value that is compared to the FrameRemaining
(FR) field before a low-speed transaction is initiated. The transaction is
started only if FrameRemaining (FR)
the HCD. The HCD must consider transmission and set-up overhead, while
calculating this value.
Rev. 05 — 8 May 2007
R/W
12
4
0
-
-
LST[7:0]
Table
R/W
11
3
1
-
-
55.
Single-chip USB OTG Controller
R/W
R/W
this field. The value is calculated by
10
1
2
0
LST[10:8]
R/W
R/W
9
1
1
0
© NXP B.V. 2007. All rights reserved.
ISP1362
R/W
R/W
80 of 152
8
0
0
0

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