CP2201-GM Silicon Laboratories Inc, CP2201-GM Datasheet - Page 33

• Manufacturer Part Number: CP2201-GM
• Description: IC ETH CTRLR SNGL-CHIP 28QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2201-GM

• Package / Case: 48-TQFP, 48-VQFP
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: Parallel/Serial
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 75mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Ethernet Connection Type: 1000BASE-T or 100BASE-T or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps or 100 Mbps or 1000 Mbps
• Maximum Operating Temperature: + 85 C
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3
• Interface Type: Parallel
• Supply Current: 60mA
• Supply Voltage Range: 3.1V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1326 - KIT REF DESIGN PWR OVER ETHERNET336-1316 - KIT EVAL FOR CP2201 ETH CTRLR
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1313

Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1:
Bit 0:
EEOPINT ERXEINT ESELFINT EOSCINT EFLWEINT ETXINT
R/W
Bit7
EEOPINT: Enable End of Packet Interrupt
0: Disable End of Packet Interrupt.
1: Enable End of Packet Interrupt.
ERXEINT: Enable Receive FIFO Empty Interrupt
0: Disable Receive FIFO Empty Interrupt.
1: Enable Receive FIFO Empty Interrupt.
ESELFINT: Enable Self Initialization Complete Interrupt
0: Disable Self Initialization Complete Interrupt.
1: Enable Self Initialization Complete Interrupt.
EOSCINT: Enable Oscillator Initialization Complete Interrupt
0: Disable Oscillator Initialization Complete Interrupt.
1: Enable Oscillator Initialization Complete Interrupt.
EFLWEINT: Enable Flash Write/Erase Operation Complete Interrupt
0: Disable Flash Write/Erase Operation Complete Interrupt.
1: Enable Flash Write/Erase Operation Complete Interrupt.
ETXINT: Enable Packet Transmitted Interrupt
0: Disable Packet Transmitted Interrupt.
1: Enable Packet Transmitted Interrupt.
ERXFINT: Enable Receive FIFO Full Interrupt
0: Disable Receive FIFO Full Interrupt.
1: Enable Receive FIFO Full Interrupt.
ERXINT: Enable Packet Received Interrupt
0: Disable Packet Received Interrupt.
1: Enable Packet Received Interrupt.
R/W
Bit6
Register 7. INT0EN: Interrupt Enable Register 0
R/W
Bit5
R/W
Bit4
R/W
Bit3
Rev. 1.0
R/W
Bit2
ERXFINT ERXINT 00000000
R/W
Bit1
R/W
Bit0
CP2200/1
Reset Value
Address:
0x64
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