CP2201-GM Silicon Laboratories Inc, CP2201-GM Datasheet - Page 40

IC ETH CTRLR SNGL-CHIP 28QFN

CP2201-GM

Manufacturer Part Number
CP2201-GM
Description
IC ETH CTRLR SNGL-CHIP 28QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2201-GM

Package / Case
48-TQFP, 48-VQFP
Controller Type
Ethernet Controller, MAC/10Base-T
Interface
Parallel/Serial
Voltage - Supply
3.1 V ~ 3.6 V
Current - Supply
75mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Ethernet Connection Type
1000BASE-T or 100BASE-T or 10BASE-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps or 100 Mbps or 1000 Mbps
Maximum Operating Temperature
+ 85 C
No. Of Ports
1
Ethernet Type
IEEE 802.3
Interface Type
Parallel
Supply Current
60mA
Supply Voltage Range
3.1V To 3.6V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1326 - KIT REF DESIGN PWR OVER ETHERNET336-1316 - KIT EVAL FOR CP2201 ETH CTRLR
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1313

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2201-GM
Manufacturer:
SiliconL
Quantity:
48
Part Number:
CP2201-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
CP2200/1
9.5. Software Reset
The software reset provides the host CPU the ability to reset the CP2200/1 through the parallel host interface.
Writing a ‘1’ to RESET (SWRST.2) will force the device to enter the reset state with the exception that the external
oscillator will not be stopped. As soon as the device enters the reset state, it will immediately exit the reset state
and start device calibration; the Oscillator Initialization Complete interrupt is not be generated. After Self
Initialization is complete, the device is fully functional.
Note: The software reset is enabled after every reset; however, it may be de-selected as a reset source (see the register
40
Bits 7–3: UNUSED. Read = 00000b, Write = don’t care.
Bit 2:
Bits 1–0: UNUSED. Read = 00b, Write = don’t care.
R\W
Bit7
description for RSTEN on page 42).
RESET: Software Reset Initiate
Writing a ‘1’ to this bit will generate a software reset.
R\W
Bit6
Register 12. SWRST: Software Reset Register
R/W
Bit5
R/W
Bit4
R/W
Bit3
Rev. 1.0
RESET
Bit2
W
R/W
Bit1
R/W
Bit0
00000000
Reset Value
Address:
0x75

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