CP2201-GM Silicon Laboratories Inc, CP2201-GM Datasheet - Page 59

• Manufacturer Part Number: CP2201-GM
• Description: IC ETH CTRLR SNGL-CHIP 28QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2201-GM

• Package / Case: 48-TQFP, 48-VQFP
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: Parallel/Serial
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 75mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Ethernet Connection Type: 1000BASE-T or 100BASE-T or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps or 100 Mbps or 1000 Mbps
• Maximum Operating Temperature: + 85 C
• No. Of Ports: 1
• Ethernet Type: IEEE 802.3
• Interface Type: Parallel
• Supply Current: 60mA
• Supply Voltage Range: 3.1V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1326 - KIT REF DESIGN PWR OVER ETHERNET336-1316 - KIT EVAL FOR CP2201 ETH CTRLR
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1313

Note: The value of CPADDRH:CPADDRL may be invalid if an overflow event occurs. After an overflow, the FIFOHEADH:FIFO-
Note: If the Receive FIFO Full Interrupt is triggered, the interrupt flag must be cleared to re-enable packet reception. The
12.4. Initializing the Receive Buffer, Filter and Hash Table
After a device reset, the receive buffer is empty and the filter is configured to accept broadcast packets and
multicast packets matching a hash value of 0x0400. This hash value allows PAUSE control packets to pass
through the receive filter.
The receive buffer does not require any additional initialization. The receive filter can be configured to accept or
ignore broadcast packets, multicast packets, runt packets (Ethernet Frame smaller than 64 bytes), and packets
with a CRC error. The receive filter is configured using the RXFILT register.
The device can be configured to accept broadcast packets and packets addressed to the controller’s MAC address
without using the hash table. If multicast packets need to be accepted, then the hash table can be programmed to
accept packets addressed to specific address ranges.
The CP2200/1 implements a 16-bit hash table to represent all possible addresses in the 64-bit address space.
Each of the possible 65536 possible values for the hash table represent a range of MAC addresses. If all 16 bits
are set to ‘1’, all multicast addresses will be accepted. If all 16-bits are set to ‘0’, then all multicast addresses will be
rejected.The following procedure can be used to determine which bits to set for a specific address:
HEADL pointer should be used to determine the starting address of the current packet. CPLEN will always remain valid
even after an overflow event.
Receive FIFO Full Interrupt is triggered based on the size of packets or on the number of packets. If triggered based on
the number of packets, then pointer corruption has occurred.
Step 1: Perform a 32-bit CRC on the 6-bytes of the address using 0xC704DD7B as the polynomial.
Step 2: Record the least significant 4 bits of the CRC result (Hash Index).
Step 3: The Hash Index determines the bit that should be set in the hash table that will allow the address to
be received. For example, if the least significant 4-bits of the CRC result are 101b (5d), then setting
bit 5 of the 16-bit hash table will allow all MAC addresses whose CRC result is 5d to be accepted.
Rev. 1.0
CP2200/1
59