LTC4269CDKD-1#PBF Linear Technology, LTC4269CDKD-1#PBF Datasheet - Page 33

IC PD/OPTO FLYBACK CTRLR 32-DFN

LTC4269CDKD-1#PBF

Manufacturer Part Number
LTC4269CDKD-1#PBF
Description
IC PD/OPTO FLYBACK CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet

Specifications of LTC4269CDKD-1#PBF

Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Input Voltage
60V
Supply Current
6.4mA
Digital Ic Case Style
DFN
No. Of Pins
32
Duty Cycle (%)
88%
Frequency
100kHz
Operating Temperature Range
0°C To +70°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
32
Mounting
Surface Mount
Package Type
DFN EP
Case Length
7mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
LTC4269CDKD-1#PBF
Manufacturer:
VOLTRONIC
Quantity:
2 140
Price:
APPLICATIONS INFORMATION
Short-Circuit Conditions
Loss of current limit is possible under certain conditions
such as an output short-circuit. If the duty cycle exhibited
by the minimum on-time is greater than the ratio of
secondary winding voltage (referred-to-primary) divided
by input voltage, then peak current is not controlled at
the nominal value. It ratchets up cycle-by-cycle to some
higher level. Expressed mathematically, the requirement
to maintain short-circuit control is
where:
Trouble is typically encountered only in applications with
a relatively high product of input voltage times secondary
to primary turns ratio and/or a relatively long minimum
switch on time. Additionally, several real world effects such
as transformer leakage inductance, AC winding losses and
output switch voltage drop combine to make this simple
theoretical calculation a conservative estimate. Prudent
design evaluates the switcher for short-circuit protection
and adds any additional circuitry to prevent destruction.
Output Voltage Error Sources
The LTC4269-1’s feedback sensing introduces additional
minor sources of errors. The following is a summary list:
• The internal bandgap voltage reference sets the reference
• The external feedback resistive divider ratio directly
• Leakage inductance on the transformer secondary
t
I
N
(other variables as previously defi ned)
voltage for the feedback amplifi er. The specifi cations
detail its variation.
affects regulated voltage. Use 1% components.
reduces the effective secondary-to-feedback winding
turns ratio (NS/NF) from its ideal value. This increases
the output voltage target by a similar percentage. Since
secondary leakage inductance is constant from part to
part (within a tolerance) adjust the feedback resistor
ratio to compensate.
DC
ON(MIN)
SC
SP
MIN
is the short-circuit output current
is the secondary-to-primary turns ratio (N
= t
is the primary-side switch minimum on-time
ON(MIN)
• f
OSC
<
I
SC
• R
(
V
SEC
IN
• N
+ R
SP
DS(ON)
SEC
)
/N
PRI
)
• The transformer secondary current fl ows through the
If the output load current is relatively constant, the feedback
resistive divider is used to compensate for these losses.
Otherwise, use the LTC4269-1 load compensation circuitry
(see Load Compensation). If multiple output windings are
used, the fl yback winding will have a signal that represents
an amalgamation of all these windings impedances. Take
care that you examine worst-case loading conditions when
tweaking the voltages.
Power MOSFET Selection
The power MOSFETs are selected primarily on the criteria of
on-resistance R
breakdown voltage (BV
and maximum drain current (ID
For the primary-side power MOSFET, the peak current is:
where XMIN is peak-to-peak current ratio as defi ned
earlier.
For each secondary-side power MOSFET, the peak cur-
rent is:
Select a primary-side power MOSFET with a BVDSS
greater than:
where NSP refl ects the turns ratio of that secondary-to
primary winding. LLKG is the primary-side leakage induc-
tance and CP is the primary-side capacitance (mostly from
the drain capacitance (COSS) of the primary-side power
MOSFET). A clamp may be added to reduce the leakage
inductance as discussed.
impedances of the winding resistance, synchronous
MOSFET R
equivalent current for these errors is higher than the
load current because conduction occurs only during
the converter’s off-time. So, divide the load current by
(1 – DC).
I
I
BV
PK(PRI)
PK(SEC)
DSS
≥I
=
=
PK
V
1− DC
DS(ON)
IN(MIN)
DS(ON)
I
L
OUT
C
LKG
P
MAX
P
and output capacitor ESR. The DC
IN
• DC
, input capacitance, drain-to-source
DSS
+ V
• 1+
MAX
⎝ ⎜
IN(MAX)
), maximum gate voltage (V
• 1+
X
(MAX)
⎝ ⎜
MIN
2
+
LTC4269-1
V
⎠ ⎟
X
).
OUT(MAX)
MIN
2
N
SP
⎠ ⎟
33
42691fb
GS
)

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