ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 15

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
ISP1362_5
Product data sheet
8.1.1 Memory organization for the Host Controller
8.1 Memory organization
The buffer memory in the Host Controller uses a multiconfigurable direct addressing
architecture. The 4096 bytes Host Controller buffer memory is shared by the ISTL0,
ISTL1, INTL and ATL buffers. ISTL0 and ISTL1 are used for isochronous traffic (double
buffer), INTL is used for interrupt traffic, and ATL is used for control and bulk traffic.
The allocation of the buffer memory follows the sequence ISTL0, ISTL1, INTL, ATL and
unused memory. For example, consider that the buffer sizes of the ISTL, INTL and ATL
buffers are 1024 bytes, 1024 bytes and 1024 bytes, respectively. Then, ISTL0 will start
from memory location 0, ISTL1 will start from memory location 1024 (size of ISTL0), INTL
will start from memory location 2048 (size of ISTL0 + size of ISTL1) and ATL will start
from memory location 3072 (size of ISTL0 + size of ISTL1 + size of INTL).
The Host Controller Driver (HCD) has the responsibility to ensure that the sum of the four
memory buffers does not exceed the total memory size. If this condition is violated, it will
lead to data corruption. The buffer size must be a multiple of 2 bytes (one word).
The buffer memory of the Peripheral Controller follows a similar architecture. Details on
the Peripheral Controller memory area allocation can be found in
the Peripheral Controller buffer memory does not support direct addressing mode.
The Host Controller in the ISP1362 has a total of 4096 bytes of buffer memory. This buffer
area is divided into four parts (see
Table 4.
The ISTL0 and ISTL1 buffers must have the same size. Memory is allocated by the Host
Controller according to the value set by the HCD in HcISTLBufferSize, HcINTLBufferSize
and HcATLBufferSize. All buffer sizes must be multiples of 2 bytes (one word).
Buffer memory area
ISTL0 and ISTL1
INTL
ATL
Buffer memory areas and their applications
Rev. 05 — 8 May 2007
Table 4
and
Application
isochronous transfer (double buffering)
interrupt transfer
control and bulk transfer
Figure
4).
Single-chip USB OTG Controller
Section
© NXP B.V. 2007. All rights reserved.
ISP1362
12.3. Note that
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