ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 73

• Manufacturer Part Number: ISP1362EE
• Description: IC USB CTRL SNGL CHIP 64TFBGA
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362EE

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

NXP Semiconductors
Table 39.
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcCommandStatus register: bit allocation
14.1.3 HcCommandStatus register (R/W: 02h/82h)
31
23
15
7
-
-
-
-
-
-
-
-
The HcCommandStatus register is a 4 bytes register, and the bit allocation is given in
Table
HCD, and it also reflects the current status of the Host Controller. To the HCD, it appears
to be a ‘write to set’ register. The Host Controller must ensure that bits written as logic 1
become set in the register while bits written as logic 0 remain unchanged in the register.
The HCD may issue multiple distinct commands to the Host Controller without concern for
corrupting previously issued commands. The HCD has normal read access to all bits.
The SchedulingOverrunCount (SOC) field indicates the number of frames with which the
Host Controller has detected the scheduling overrun error. This occurs when the periodic
list does not complete before the End-Of-Frame (EOF). When a scheduling overrun error
is detected, the Host Controller increments the counter and sets the SchedulingOverrun
(SO) field of the HcInterruptStatus register.
Code (Hex): 02 — read
Code (Hex): 82 — write
39. This register is used by the Host Controller to receive commands issued by the
30
22
14
6
-
-
-
-
-
-
-
-
29
21
13
5
-
-
-
-
-
-
-
-
reserved
Rev. 05 — 8 May 2007
reserved
28
20
12
4
-
-
-
-
-
-
-
-
reserved
reserved
27
19
11
3
-
-
-
-
-
-
-
-
Single-chip USB OTG Controller
26
18
10
2
-
-
-
-
-
-
-
-
25
17
R
0
9
1
-
-
-
-
-
-
© NXP B.V. 2007. All rights reserved.
ISP1362
SOC[1:0]
HCR
R/W
72 of 152
24
16
R
0
8
0
0
-
-
-
-