Z8523016PSC Zilog, Z8523016PSC Datasheet - Page 24
Z8523016PSC
Manufacturer Part Number
Z8523016PSC
Description
IC 16MHZ ESCC 40-DIP
Manufacturer
Zilog
Datasheet
1.Z8523L10VEG.pdf
(118 pages)
Specifications of Z8523016PSC
Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
7mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3053
- Current page: 24 of 118
- Download datasheet (2Mb)
Z80230/Z85230/L
Product Specification
19
SDLC Status FIFO
The ESCC’s ability to receive high speed back-to-back SDLC frames is maximized by a
10-bit deep by 19-bit wide status FIFO buffer. When enabled (through WR15 bit 2 is 1),
the storage area enables DMA to continue data transfer into the memory, so that the CPU
examines the message later. For each SDLC frame, 14 counter bits and 5 Status/Error bits
are stored. The byte count and status bits are accessed through Read Registers, RR6, and
RR7. RR6 and RR7 are only used when the SDLC FIFO buffer is enabled. The 10 x 19
status FIFO buffer is separate from the 8-byte receive data FIFO buffer.
Baud Rate Generator
Each channel in the ESCC contains a programmable BRG. Each generator consists of two
8-bit registers that form a 16-bit time constant, a 16-bit down counter, and a flip-flop on
the output, producing a square wave. At start-up, the flip-flop at the output is set High, the
value in the time constant register is loaded into the counter, and the count down begins.
When the BRG reaches zero, the output toggles, the counter is reloaded with the time con-
stant, and the process repeats. The time constant can be changed at any time, but the new
value does not take effect until the counter is loaded again.
The output of the BRG may be used as the Transmit clock, the Receive clock, or both. The
output can also drive the DPLL. For more information, see
Digital Phase-Locked
Loop.
If the receive clock or the transmit clock is not programmed to come from the TRxC pin,
the output of the BRG may be echoed out by the TRxC pin.
The following formula relates the time constant to the baud rate. PCLK or RTxC is the
clock input to the BRG. The clock mode is 1, 16, 32, or 64, as selected in WR 4 bits 6 and
7.
PCLK or RTxC Frequency
Time Constant =
-2
2(Baud Rate) (Clock Mode)
Digital Phase-Locked Loop
The ESCC contains a DPLL to recover clock information from a data stream with NRZI or
FM encoding. The DPLL is driven by a clock that is nominally 32 (NRZI) or 16 (FM)
times the data rate. The DPLL uses this clock, along with the data stream, to construct a
clock for the data. This clock is then used as the ESCC receive clock, the transmit clock,
or both. When the DPLL is selected as the transmit clock source, it provides a jitter-free
clock output. The clock output is the DPLL input frequency divided by the appropriate
divisor for the selected encoding technique.
For NRZI encoding, the DPLL counts the 32x clock to create nominal bit times. As the
32x clock is counted, the DPLL searches the incoming data stream for edges (either 1 to 0
or 0 to 1). When a transition is detected the DPLL makes a count adjustment (during the
next counting cycle), producing a terminal count closer to the center of the bit cell.
PS005308-0609
Functional Description
Related parts for Z8523016PSC
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Enhanced Serial Communications Controller
Manufacturer:
ZiLOG Semiconductor
Datasheet:
Part Number:
Description:
Communication Controllers, ZILOG INTELLIGENT PERIPHERAL CONTROLLER (ZIP)
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
KIT DEV FOR Z8 ENCORE 16K TO 64K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
KIT DEV Z8 ENCORE XP 28-PIN
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
DEV KIT FOR Z8 ENCORE 8K/4K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
KIT DEV Z8 ENCORE XP 28-PIN
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
DEV KIT FOR Z8 ENCORE 4K TO 8K
Manufacturer:
Zilog
Datasheet:
Part Number:
Description:
CMOS Z8 microcontroller. ROM 16 Kbytes, RAM 256 bytes, speed 16 MHz, 32 lines I/O, 3.0V to 5.5V
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
Low-cost microcontroller. 512 bytes ROM, 61 bytes RAM, 8 MHz
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
Z8 4K OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
CMOS SUPER8 ROMLESS MCU
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
SL1866 CMOSZ8 OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
SL1866 CMOSZ8 OTP Microcontroller
Manufacturer:
Zilog, Inc.
Datasheet:
Part Number:
Description:
OTP (KB) = 1, RAM = 125, Speed = 12, I/O = 14, 8-bit Timers = 2, Comm Interfaces Other Features = Por, LV Protect, Voltage = 4.5-5.5V
Manufacturer:
Zilog, Inc.
Datasheet: