E-L5991AD13TR STMicroelectronics, E-L5991AD13TR Datasheet
E-L5991AD13TR
Specifications of E-L5991AD13TR
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E-L5991AD13TR Summary of contents
Page 1
... Based on a standard current mode PWM control- ler this device includes some features such as programmable soft start, IN/OUT synchronization, disable (to be used for over voltage protection and for power management), precise maximum Duty Cycle Control, 100ns leading edge blanking on current sense, pulse by pulse current limit, over- ...
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... Signal ground 13 ISEN Current sense 14 DIS Disable. It must never be left floating. TIE to SGND if not used. 15 DC-LIM Connecting this pin to Vref limited to 50 left floating or grounded no limitation is imposed 16 ST-BY Standby. Connect a resistor to RCT. Connect to VREF or floating if not used. 2/23 Parameter < 50mA) (*) = 70 C (DIP16) ...
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... V = 4.5V j comp pin 15 = Vref 20V 4.5V comp pin 15 = Vref 20V comp pin 3 = 0,7V, pin REF pin 3 = 0.7V, pin 15 = OPEN pin 3 = 3.2V, pin REF pin 3 = 3.2V, pin 15 = OPEN pin 3 = 2.79V, pin 15 = OPEN V to GND COMP COMP 20V 2mA sink I = 0.5mA 2.3V ...
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... V Sync Pulse 1 I Sync Pulse Current 1 OVER CURRENT PROTECTION V Fault Threshold Voltage t DISABLE SECTION Shutdown threshold Input Bias Current I Quiescent current After qSH Disable Figure 1. L5991 - Quiescent current vs. input voltage 7.6V and Y= 8.4V for L5991A ° 4/23 Test Condition C = 1nF ...
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... Figure 3. Quiescent current vs. input voltage ref 4.5Koh ° 00K Figure 5. Quiescent current vs. input voltage and switching frequency. Iq [mA 1nF 25° 100 Vcc [V] Figure 7. Reference voltage vs. load current. Vref [V] 5.1 Vcc=15V 5. 25°C 5 4.95 4 Iref [mA] Figure 4. Quiescent current vs. input voltage nF 25°C ...
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... Isource [A] Figure 13. UVLO Saturation Ipin10 [mA] 50 Vcc < Vccon 40 before turn- 200 400 600 800 Vpin10 [mV] 6/23 Figure 10. Vref SVRR vs. switching frequency. SVRR (dB) 120 100 125 150 1 Figure 12. Output saturation. V sat = V 2.5 2 1.5 1 0.5 0 0.8 1 1.2 0 Figure 14. Timing resistor vs. switching frequency. ...
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... Vcc = 15V, V15=Vref 300 290 280 -50 - (°C) Figure 17. Dead time vs Ct. Dead time [ns] 1,500 Rt =4.5Kohm 1,200 900 600 300 Timing capacitor Ct [nF] Figure 19. Delay to output vs junction temperature. Delay to output (ns -50 - (°C) Figure 16. Switching frequency vs. temperature. fsw (KHz) 320 310 300 290 ...
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... As a master, the pin delivers positive pulses dur- ing the falling edge of the oscillator (see pin 2). In slave operation the circuit is edge triggered. Refer to fig see how it works. When several IC work in parallel no master-slave designation is needed because the fastest one becomes auto- Figure 22 ...
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... R should be selected for frequency in any condition (typically, 10-20 depending also on the tolerance of the parts. Pin 3. DC (Duty Cycle Control). By biasing this pin with a voltage between 1 and possible , 2 to set the maximum duty cycle between 0 and the K T upper extreme max ...
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... In particular, this means that the open-loop crossover frequency must not exceed f f /5. SB The voltage on pin 6 is monitored in order to re- 10/23 duce the oscillator frequency when the converter is lightly loaded (standby). Pin 7. SS (Soft-Start). At device start-up, a ca- pacitor (Css) connected between this pin and SGND (pin 12) is charged by an internal current generator, ISSC about 7V ...
Page 11
... Usually, this will be a PowerMOS, al- though the driver is powerful enough to drive BJT’s (1.6A source, 2A sink, peak). The driver is made totem pole with a high- side NPN Darlington and a low-side VDMOS, thus there is no need of an external diode clamp to prevent voltage from going below ground. An in- ternal clamp limits the voltage delivered to the gate at 13V ...
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... L5991 - L5991A in fig.28) holds the pin low in order to ensure that the external MOS cannot be turned on acciden- tally. The peculiarity of this circuit is its ability to mantain the same sink capability (typically, 20mA @ 1V) from the start-up threshold. CC When the threshold is exceeded and the L5991 starts operating pulled high (refer to fig ...
Page 13
... Pin 16. S-BY (Standby Function). The resistor R along with R UVLO D97IN502 oscillator in normal operation (f as the STANDBY signal is high, the pin is inter- nally connected to the reference voltage VREF by a N-channel FET (see fig. 32), so the timing ca- pacitor C the STANDBY signal goes low the N-channel FET 11 is turned off and the pin becomes floating ...
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... L5991 - L5991A now disconnected and C is charged through R T only. In this way the oscillator frequency (f be lower. Refer to pin 2 description to see how to calculate the timing components. Typical values for V and respectively. This 1.5V hysteresis is enough to prevent undesired frequency change 5 ratio. osc ...
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... APPLICATION IDEAS Here follows a series of ideas/suggestions aimed at Figure 33. Typical application circuit for computer monitors (90W). either improving performance or solving common application problems of L5991 based supplies. L5991 - L5991A 15/23 ...
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... L5991 - L5991A Figure 34. Typical application circuit for inkjet printers (40W). 16/23 ...
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... Figure 35. Standby thresholds adjustment. Figure 36. Isolated MOSFET Drive & Current Transformer Sensing in 2-switch Topologies. L5991 12 PGND Figure 37. Low consumption start-up. 20V Figure 38. Bipolar transistor driver. L5991 SGND VREF ISEN R A OPTIONAL D97IN751A ISOLATION BOUNDARY OUT ISEN 13 11 SGND V IN 2.2M 33K ...
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... Error Amp compensation circuit for stabilizing any current-mode topology except for boost and flyback converters operating with continuous inductor current. From Error Amp compensation circuit for stabilizing current-mode boost and flyback topologies operating with continuous inductor current. Figure 40. Feedback with optocoupler. L5991 Figure 41. Slope compensation techniques. ST- REF ...
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... SGND PGND D97IN754 Figure 43 Protection against overvoltage/feed- back disconnection (not latched) R START V CC VREF 4 8 L5991 Figure 45. Constant power in pulse-by-pulse current limitation (flyback discontinuous 400V DC OUT L5991 11 PGND SGND Figure 46. Voltage mode operation Figure 44. Device shutdown on overcurrent L5991 11 PGND SGND ...
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... L5991 - L5991A Figure 47. Device shutdown on mains undervoltage 80÷400V Figure 48. Synchronization to flyback pulses (for monitors). 20/ VREF 4 4.7K 3 5.1 R2 10K SGND D97IN750B SYNC L5991 5.1V SGND L5991 12 11 PGND D97IN753A ...
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... DIM. MIN. TYP. MAX. MIN. a1 0.51 0.020 B 0.77 1.65 0.030 b 0 8.5 e 2.54 e3 17.78 F 7.1 I 5.1 L 3.3 Z 1.27 inch MECHANICAL DATA TYP. MAX. 0.065 0.020 0.010 0.787 0.335 0.100 0.700 0.280 0.201 0.130 0.050 L5991 - L5991A OUTLINE AND DIP16 21/23 ...
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... G 4.6 5.3 0.181 L 0.4 1.27 0.016 M 0.62 8˚(max.) S (1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch). 22/23 inch TYP. MAX. MECHANICAL DATA 0.069 0.009 0.063 0.018 0.010 0.020 0.394 0.244 0.050 ...
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