AD9910BSVZ Analog Devices Inc, AD9910BSVZ Datasheet - Page 16

• Manufacturer Part Number: AD9910BSVZ
• Description: IC DDS 1GSPS 14BIT PAR 100TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9910BSVZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
• Resolution (bits): 14 b
• Master Fclk: 1GHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Pll Type: Frequency Synthesis
• Frequency: 1GHz
• Supply Current: 29mA
• Supply Voltage Range: 1.71V To 1.89V
• Digital Ic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9910/PCBZ - BOARD EVAL FOR AD9910 1GSPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9910
APPLICATION CIRCUITS
Figure 20. Synchronizing Multiple Devices to Increase Channel Capacity Using the AD9510 as a Clock Distributor for the Reference and Synchronization Clock
Figure 21. Clock Generation Circuit Using the AD9512/AD9513/AD9514/AD9515 Series of Clock Distribution Chips
n = DEPENDENT ON PRODUCT SELECTION.
REFCLK
REFERENCE
Figure 19. DDS in PLL Feedback Locking to Reference, Offering Fine Frequency and Delay Adjust Tuning
CENTRAL
CONTROL
÷
÷
AD9910
AD9510, AD9511, ADF4106
FPGA
FPGA
FPGA
FPGA
LPF
SOURCE
COMPARATOR
CLOCK
DELAY EQUALIZATION
PHASE
SYNCHRONIZATION
SYNC_CLK
SYNC_CLK
SYNC_CLK
DATA
DATA
DATA
DATA
CH 2
SYNC_CLK
Rev. C | Page 16 of 64
AD9510
AD9910
DELAY EQUALIZATION
CLOCK DISTRIBUTOR
LPF
CHARGE
PUMP
AD9510
WITH
DIVIDER AND DELAY ADJUST
PROGRAMMABLE 1 TO 32
REF_CLK
REF_CLK
C1
S1
C2
S2
C3
S3
C4
S4
AD9515
AD9514
AD9513
AD9512
AD9910
(MASTER)
AD9910
AD9910
AD9910
(SLAVE 1)
(SLAVE 2)
(SLAVE 3)
FILTER
LOOP
SYNC_OUT
n
VCO
A1
A2
A3
A4
CLOCK OUTPUT
A_END
SELECTION(S)
LVPECL
CMOS
LVDS