PIC16F877-20/L Microchip Technology Inc., PIC16F877-20/L Datasheet - Page 95
PIC16F877-20/L
Manufacturer Part Number
PIC16F877-20/L
Description
44 PIN, 7 KB FLASH, 368 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F877-20L.pdf
(218 pages)
Specifications of PIC16F877-20/L
A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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9.2.18.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 9-25:
FIGURE 9-26:
2001 Microchip Technology Inc.
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
SDA
PEN
SCL
Bus Collision During a STOP
Condition
P
’0’
’0’
’0’
’0’
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
Assert SDA
T
SDA asserted low
BRG
T
BRG
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ’0’. If the SCL pin is sampled low before
SDA is allowed to float high, a bus collision occurs. This
is a case of another master attempting to drive a data
’0’ (Figure 9-25).
SCL goes low before SDA goes high,
Set BCLIF
T
BRG
T
BRG
PIC16F87X
DS30292C-page 93
’0’
’0’
SDA sampled
low after T
Set BCLIF
BRG
,
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