PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 110

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PIC18F8520-I/PT

Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8520-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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PIC18F6520/8520/6620/8620/6720/8720
TABLE 10-3:
TABLE 10-4:
DS39609B-page 108
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
Legend:
RB0/INT0
RB1/INT1
RB2/INT2
RB3/INT3/CCP2
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
Name
Name
2:
3:
4:
LATB Data Output Register
PORTB Data Direction Register
x = unknown, u = unchanged. Shaded cells are not used by PORTB.
This buffer is a Schmitt Trigger input when configured as the external interrupt.
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
RC1 is the alternate assignment for CCP2 when CCP2MX is not set (all operating modes except
Microcontroller mode).
This buffer is a Schmitt Trigger input when configured as the CCP2 input.
INT2IP
RBPU
GIEH
Bit 7
RB7
GIE/
(3)
PORTB FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP
INT1IP
PEIE/
GIEL
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Bit 6
RB6
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TMR0IE
INT3IE
Buffer
Bit 5
RB5
TTL
(1)
(1)
(1)
(4)
(2)
(2)
(2)
INT0IE
INT2IE
Bit 4
RB4
Input/output pin or external interrupt input 0.
Internal software programmable weak pull-up.
Input/output pin or external interrupt input 1.
Internal software programmable weak pull-up.
Input/output pin or external interrupt input 2.
Internal software programmable weak pull-up.
Input/output pin or external interrupt input 3. Capture2 input/Compare2
output/PWM output (when CCP2MX configuration bit is enabled, all
PIC18F8X20 operating modes except Microcontroller mode).
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Low-voltage ICSP enable pin.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming clock.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming data.
INT1IE
RBIE
Bit 3
RB3
TMR0IF
INT3IF
Bit 2
RB2
INT3IP
INT0IF
INT2IF
Bit 1
RB1
Function
INT1IF
RBIP
RBIF
Bit 0
RB0
 2004 Microchip Technology Inc.
xxxx xxxx
xxxx xxxx
1111 1111
0000 0000
1111 1111
1100 0000
POR, BOR
Value on
uuuu uuuu
uuuu uuuu
1111 1111
0000 0000
1111 1111
1100 0000
Value on
all other
Resets

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