PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 152

• Manufacturer Part Number: PIC18F8520-I/PT
• Description: 80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8520-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 68
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC18F6520/8520/6620/8620/6720/8720
16.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
16.1.1
The CCP modules utilize Timers 1, 2, 3 or 4, depending
on the mode selected. Timer1 and Timer3 are available
to modules in Capture or Compare modes, while
Timer2 and Timer4 are available for modules in PWM
mode.
FIGURE 16-1:
DS39609B-page 150
Timer1 is used for all Capture
and Compare operations for
all CCP modules. Timer2 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
Timer3 and Timer4 are not
available.
TMR1
TMR2
T3CCP<2:1> = 00
CCP1
CCP2
CCP3
CCP4
CCP5
share
CCP Module Configuration
CCP MODULES AND TIMER
RESOURCES
either
TMR3
TMR4
CCP AND TIMER INTERCONNECT CONFIGURATIONS
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for CCP1
only (depending on selected
mode).
All other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base, if they are in Capture/
Compare or PWM modes.
TMR1
TMR2
CCP1
T3CCP<2:1> = 01
share
either
TMR3
TMR4
CCP2
CCP3
CCP4
CCP5
timer
Timer1 and Timer2 are used
for Capture and Compare or
PWM operations for CCP1
and CCP2 only (depending on
the mode selected for each
module). Both modules may
use a timer as a common time
base if they are both in
Capture/Compare or PWM
modes.
The other modules use either
Timer3 or Timer4. Modules
may
resource as a common time
base if they are in Capture/
Compare or PWM modes.
TABLE 16-1:
The assignment of a particular timer to a module is
determined by the Timer-to-CCP Enable bits in the
T3CON register (Register 14-1). Depending on the
configuration selected, up to four timers may be active
at once, with modules in the same configuration
(Capture/Compare or PWM) sharing timer resources.
The possible configurations are shown in Figure 16-1.
TMR1
TMR2
CCP1
CCP2
T3CCP<2:1> = 10
share
CCP Mode
Compare
Capture
PWM
either
TMR3
TMR4
CCP3
CCP4
CCP5
CCP MODE – TIMER
RESOURCE
timer
 2004 Microchip Technology Inc.
Timer3 is used for all Capture
and Compare operations for
all CCP modules. Timer4 is
used for PWM operations for
all CCP modules. Modules
may
resource as a common time
base.
Timer1 and Timer2 are not
available.
TMR1
TMR2
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2 or Timer4
T3CCP<2:1> = 11
share
either
TMR3
TMR4
CCP1
CCP2
CCP3
CCP4
CCP5
timer