PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 157

• Manufacturer Part Number: PIC18F8520-I/PT
• Description: 80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8520-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 68
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
EQUATION 16-3:
TABLE 16-3:
TABLE 16-4:
 2004 Microchip Technology Inc.
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
PIR3
PIE3
IPR3
TMR2
PR2
T2CON
T3CON
TMR4
PR4
T4CON
CCPRxL
CCPRxH
CCPxCON
Legend:
Note 1:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
Name
PWM Resolution (max)
PWM Frequency
(1)
(1)
(1)
x = unknown, u = unchanged, – = unimplemented, read as
Generic term for all of the identical registers of this name for all CCP modules, where ‘x’ identifies the individual module
(CCP1 through CCP5). Bit assignments and Reset values for all registers of the same generic name are identical.
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
Timer2 Module Register
Timer2 Module Period Register
Timer4 Register
Timer4 Period Register
Capture/Compare/PWM Register x (LSB)
Capture/Compare/PWM Register x (MSB)
GIE/GIEH PEIE/GIEL
PSPIF
PSPIE
PSPIP
RD16
IPEN
Bit 7
—
—
—
—
—
—
—
—
—
PIC18F6520/8520/6620/8620/6720/8720
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
REGISTERS ASSOCIATED WITH PWM, TIMER2 AND TIMER4
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 -000 0000 uuuu uuuu
T3CCP2
CMIE
CMIF
CMIP
ADIE
ADIP
Bit 6
ADIF
—
—
—
—
—
=
log
-----------------------------bits
T3CKPS1
log
2.44 kHz
14


TMR0IE
DCxB1
RC2IE
RC2IP
RC2IF
---------------
F
F
RCIF
RCIE
RCIP
Bit 5
FFh
PWM
—
—
—
—
OSC
16
2
10


T3CKPS0
DCxB0
INT0IE
TX2IF
TX2IE
TX2IP
TXIE
TXIP
EEIE
EEIF
EEIP
Bit 4
TXIF
9.77 kHz
RI
12
FFh
4
10
CCPxM3
T3CCP1
TMR4IF
TMR4IE
TMR4IP
SSPIF
SSPIE
SSPIP
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
TO
39.06 kHz
16.4.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
‘0’
FFh
. Shaded cells are not used by PWM, Timer2, or Timer4.
10
1
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISC<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
T3SYNC TMR3CS TMR3ON 0000 0000 uuuu uuuu
CCPxM2 CCPxM1 CCPxM0 --00 0000 --00 0000
TMR0IF
CCP1IE
CCP1IP
CCP5IE
CCP5IP
CCP1IF
CCP5IF
LVDIE
LVDIP
LVDIF
Bit 2
PD
SETUP FOR PWM OPERATION
156.25 kHz
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
CCP4IE
CCP4IP
CCP4IF
INT0IF
Bit 1
POR
3Fh
1
8
TMR1IE 0000 0000 0000 0000
TMR1IP 0111 1111 0111 1111
TMR1IF 0000 0000 0000 0000
CCP2IF -0-0 0000 ---0 0000
CCP2IE -0-0 0000 ---0 0000
CCP2IP -1-1 1111 ---1 1111
CCP3IF --00 0000 --00 0000
CCP3IE --00 0000 --00 0000
CCP3IP --11 1111 --11 1111
RBIF
Bit 0
BOR
312.50 kHz
1Fh
1
7
0000 0000 0000 0000
0--1 11qq 0--q qquu
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 uuuu uuuu
1111 1111 uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
POR, BOR
DS39609B-page 155
Value on
416.67 kHz
6.58
17h
1
Value on
all other
Resets