PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 232

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PIC18F8520-I/PT

Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8520-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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PIC18F6520/8520/6620/8620/6720/8720
FIGURE 21-1:
21.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 21-1) keep CV
ence source rails. The voltage reference is derived
from the reference source; therefore, the CV
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 26.0 “Electrical Characteristics”.
21.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
DS39609B-page 230
CVREN
Note: R is defined in Section 26.0 “Electrical Characteristics”.
Voltage Reference Accuracy/Error
Operation During Sleep
CVRSS = 0
CV
REF
V
DD
REF
VOLTAGE REFERENCE BLOCK DIAGRAM
V
from approaching the refer-
REF
CVRSS = 1
+
8R
R
REF
output
R
16 Stages
16-1 Analog Mux
21.4
A device Reset disables the voltage reference by
clearing bit CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA2 pin by clearing
bit CVROE (CVRCON<6>) and selects the high-
voltage range by clearing bit CVRR (CVRCON<5>).
The VRSS value select bits, CVRCON<3:0>, are also
cleared.
21.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RF5 pin if the
TRISF<5> bit is set and the CVROE bit is set. Enabling
the voltage reference output onto the RF5 pin,
configured as a digital input, will increase current
consumption. Connecting RF5 as a digital output with
VRSS enabled will also increase current consumption.
The RF5 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage refer-
ence output for external connections to V
Figure 21-2 shows an example buffering technique.
R
Effects of a Reset
Connection Considerations
R
 2004 Microchip Technology Inc.
8R
CVR3
CVR0
(From CVRCON<3:0>)
CVRR
CVRSS = 0
CVRSS = 1
V
REF
-
REF
.

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