PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 275

no-image

PIC18F8520-I/PT

Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8520-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F8520-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8520-I/PT
Manufacturer:
MICROCHIP-Pb
Quantity:
6 416
Part Number:
PIC18F8520-I/PT
Manufacturer:
MICROCHIP-Pb
Quantity:
3 827
Part Number:
PIC18F8520-I/PT
Manufacturer:
MICROCHIP-Pb
Quantity:
5 738
Part Number:
PIC18F8520-I/PT
Manufacturer:
MICRCOHI
Quantity:
20 000
BTG
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction:
After Instruction:
Decode
PORTC =
PORTC =
Q1
PIC18F6520/8520/6620/8620/6720/8720
register ‘f’
Bit Toggle f
[ label ] BTG f,b[,a]
0
0
a
(f<b>)
None
Bit ‘b’ in data memory location ‘f’ is
inverted. If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
BTG
Read
0111
Q2
0111 0101 [0x75]
0110 0101 [0x65]
f
b < 7
[0,1]
255
PORTC,
f<b>
bbba
Process
Data
Q3
4, 0
ffff
register ‘f’
Write
Q4
ffff
BOV
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
No
PC
If Overflow
If Overflow
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Overflow
[ label ] BOV
-128
if Overflow bit is ‘1’
(PC) + 2 + 2n
None
If the Overflow bit is ‘1’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC+2+2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
1110
No
Q2
Q2
‘n’
‘n’
=
=
=
=
=
n
address (HERE)
1;
address (Jump)
0;
address (HERE+2)
127
0100
BOV
operation
Process
Process
Data
Data
No
Q3
Q3
n
DS39609B-page 273
PC
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn

Related parts for PIC18F8520-I/PT