PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 55

• Manufacturer Part Number: PIC18F8520-I/PT
• Description: 80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F8520-I/PT

• A/d Inputs: 16-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 68
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 80-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

TABLE 4-3:
 2004 Microchip Technology Inc.
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
LVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
CCPR2H
CCPR2L
CCP2CON
Legend:
Note 1:
File Name
2:
3:
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition
RA6 and associated bits are configured as port pins in RCIO and ECIO Oscillator modes only and read ‘0’ in all other oscillator
modes.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
These registers are unused on PIC18F6X20 devices; always maintain these clear.
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented
(not a physical register)
Uses contents of FSR2 to address data memory – value of FSR2 pre-incremented
(not a physical register) – value of FSR2 offset by value in WREG
Indirect Data Memory Address Pointer 2 Low Byte
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
SSP Receive Buffer/Transmit Register
SSP Address Register in I
A/D Result Register High Byte
A/D Result Register Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 2 High Byte
Capture/Compare/PWM Register 2 Low Byte
TMR0ON
WCOL
GCEN
ADFM
RD16
IPEN
Bit 7
SMP
—
—
—
—
—
—
—
—
—
—
PIC18F6520/8520/6620/8620/6720/8720
REGISTER FILE SUMMARY (CONTINUED)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
ACKSTAT
SSPOV
T08BIT
Bit 6
CKE
—
—
—
—
—
—
—
—
—
—
—
—
2
C Slave mode. SSP Baud Rate Reload Register in I
T1CKPS1
SSPEN
ACKDT
VCFG1
DC1B1
DC2B1
IRVST
CHS3
T0CS
Bit 5
D/A
—
—
—
—
—
—
T1CKPS0
ACKEN
LVDEN
VCFG0
DC1B0
DC2B0
CHS2
T0SE
Bit 4
CKP
—
—
—
RI
—
N
P
Indirect Data Memory Address Pointer 2 High Byte
T1OSCEN
CCP1M3
CCP2M3
SSPM3
PCFG3
LVDL3
RCEN
CHS1
Bit 3
PSA
OV
TO
—
—
—
S
TMR2ON
T1SYNC
CCP1M2
CCP2M2
SSPM2
PCFG2
ADCS2
T0PS2
LVDL2
CHS0
Bit 2
PEN
R/W
PD
—
—
Z
2
C Master mode.
GO/DONE
T2CKPS1
TMR1CS
CCP1M1
CCP2M1
SSPM1
PCFG1
ADCS1
T0PS1
LVDL1
RSEN
Bit 1
POR
DC
UA
—
—
T2CKPS0 -000 0000 33, 141
TMR1ON 0-00 0000 33, 135
CCP1M0 --00 0000 34, 149
CCP2M0 --00 0000 34, 149
SWDTE
SSPM0
PCFG0
ADCS0
T0PS0
LVDL0
ADON
Bit 0
SCS
BOR
SEN
BF
C
DS39609B-page 53
---- 0000
xxxx xxxx
---x xxxx
0000 0000 33, 133
xxxx xxxx 33, 133
1111 1111 33, 131
---- ---0
--00 0101 33, 235
---- ---0 33, 250
0--1 11qq
xxxx xxxx 33, 135
xxxx xxxx 33, 135
0000 0000 33, 141
1111 1111 33, 142
xxxx xxxx 33, 157
0000 0000 33, 166
0000 0000 33, 158
0000 0000 33, 168
0000 0000 33, 169
xxxx xxxx 34, 215
xxxx xxxx 34, 215
--00 0000 34, 213
--00 0000 34, 214
0--- -000 34, 215
xxxx xxxx 34, 151,
xxxx xxxx 34, 151,
xxxx xxxx 34, 151,
xxxx xxxx 34, 151,
POR, BOR
Value on
n/a
n/a
on page:
Details
33, 60,
33, 57
33, 57
33, 59
25, 33
101
152
152
152
152
57
57