PIC18F8520-I/PT Microchip Technology Inc., PIC18F8520-I/PT Datasheet - Page 63

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PIC18F8520-I/PT

Manufacturer Part Number
PIC18F8520-I/PT
Description
80 PIN, 32 KB FLASH, 2048 RAM, 68 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F8520-I/PT

A/d Inputs
16-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
68
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
80-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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5.0
The Flash program memory is readable, writable and
erasable, during normal operation over the entire V
range.
A read from program memory is executed on one byte
at a time. A write to program memory is executed on
blocks of 8 bytes at a time. Program memory is erased
in blocks of 64 bytes at a time. A bulk erase operation
may not be issued from user code.
Writing or erasing program memory will cease
instruction fetches until the operation is complete. The
program memory cannot be accessed during the write
or erase, therefore, code cannot execute. An internal
programming timer terminates program memory writes
and erases.
A value written to program memory does not need to be
a valid instruction. Executing a program memory
location that forms an invalid instruction results in a
NOP.
5.1
In order to read and write program memory, there are
two operations that allow the processor to move bytes
between the program memory space and the data
RAM:
• Table Read (TBLRD)
• Table Write (TBLWT)
FIGURE 5-1:
 2004 Microchip Technology Inc.
Note 1: Table Pointer points to a byte in program memory.
TBLPTRU
FLASH PROGRAM MEMORY
Table Reads and Table Writes
Table Pointer
PIC18F6520/8520/6620/8620/6720/8720
TBLPTRH
TABLE READ OPERATION
(1)
TBLPTRL
Program Memory
(TBLPTR)
DD
Instruction: TBLRD*
Program Memory
The program memory space is 16 bits wide, while the
data RAM space is 8 bits wide. Table reads and table
writes move data between these two memory spaces
through an 8-bit register (TABLAT).
Table read operations retrieve data from program mem-
ory and place it into the data RAM space. Figure 5-1
shows the operation of a table read with program
memory and data RAM.
Table write operations store data from the data memory
space into holding registers in program memory. The
procedure to write the contents of the holding registers
into program memory is detailed in Section 5.5
“Writing to Flash Program Memory”. Figure 5-2
shows the operation of a table write with program
memory and data RAM.
Table operations work with byte entities. A table block
containing data, rather than program instructions, is not
required to be word aligned. Therefore, a table block
can start and end at any byte address. If a table write is
being used to write executable code into program
memory, program instructions will need to be word
aligned.
Table Latch (8-bit)
TABLAT
DS39609B-page 61

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