PIC16F871-I/P Microchip Technology Inc., PIC16F871-I/P Datasheet
PIC16F871-I/P
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... Microchip Technology Inc. PIC16F870/871 Data Sheet 28/40-Pin, 8-Bit CMOS FLASH Microcontrollers DS30569B ...
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... QS-9000 compliant for its PICmicro ® 8-bit MCUs ® code hopping EE OQ devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. 2003 Microchip Technology Inc ...
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... CMOS FLASH Microcontrollers Devices Included in this Data Sheet: • PIC16F870 • PIC16F871 Microcontroller Core Features: • High performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two-cycle • Operating speed MHz clock input DC - 200 ns instruction cycle • ...
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... RB3/PGM DS30569B-page 2 28 RB7/PGD 27 RB6/PGC 26 RB5 25 RB4 RB3/PGM 24 23 RB2 22 RB1 21 RB0/INT RC7/RX/DT RC6/TX/CK 17 RC5 16 RC4 15 PLCC RA4/T0CKI 7 RA5/AN4 8 RE0/RD/AN5 9 RE1/WR/AN6 10 RE2/CS/AN7 11 PIC16F871 OSC1/CLKI 14 OSC2/CLKO 15 RC0/T1OSO/T1CK1 RC0/T1OSO/T1CKI 32 OSC2/CLKO 31 30 OSC1/CLKI RE2/CS/AN7 RE1/WR/AN6 26 RE0/RD/AN5 25 RA5/AN4 24 23 RA4/T0CKI 39 RB3/PGM 38 RB2 37 RB1 RB0/INT ...
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... EEPROM Data Memory Interrupts I/O Ports Timers Capture/Compare/PWM modules Serial Communications Parallel Communications 10-bit Analog-to-Digital Module Instruction Set 2003 Microchip Technology Inc. PIC16F870/871 PIC16F870 PIC16F871 MHz MHz POR, BOR (PWRT, OST) POR, BOR (PWRT, OST) 2K 128 64 10 Ports A,B,C Ports A,B,C,D,E 3 ...
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... When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com/cn to receive the most current information on all of our products. DS30569B-page 4 2003 Microchip Technology Inc. ...
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... Higher order bits are from the STATUS register. 2003 Microchip Technology Inc. There are two devices (PIC16F870 and PIC16F871) covered by this data sheet. The PIC16F870 device comes in a 28-pin package and the PIC16F871 device TM comes in a 40-pin package. The 28-pin device does not Manual have a Parallel Slave Port implemented ...
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... PIC16F870/871 FIGURE 1-2: PIC16F871 BLOCK DIAGRAM Device Program FLASH Data Memory PIC16F871 2K 128 Bytes 13 FLASH Program Memory Program 14 Bus Instruction reg 8 Instruction Decode & Control Timing Generation OSC1/CLKI OSC2/CLKO MCLR Timer0 Timer1 Data EEPROM CCP1 Note 1: Higher order bits are from the STATUS register. ...
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... This buffer is a Schmitt Trigger input when configured as the external interrupt or LVP mode. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. 2003 Microchip Technology Inc. PIC16F870/871 I/O/P Buffer Type ...
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... PIC16F870/871 TABLE 1-2: PIC16F871 PINOUT DESCRIPTION DIP PLCC QFP Pin Name Pin# Pin# Pin# OSC1/CLKI 13 14 OSC2/CLKO 14 15 MCLR/V /THV RA0/AN0 2 3 RA1/AN1 3 4 RA2/AN2 REF RA3/AN3 REF RA4/T0CKI 6 7 RA5/AN4 7 8 RB0/INT 33 36 RB1 34 37 RB2 35 38 RB3/PGM 36 39 RB4 ...
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... TABLE 1-2: PIC16F871 PINOUT DESCRIPTION (CONTINUED) DIP PLCC QFP Pin Name Pin# Pin# Pin# RD0/PSP0 19 21 RD1/PSP1 20 22 RD2/PSP2 21 23 RD3/PSP3 22 24 RD4/PSP4 27 30 RD5/PSP5 28 31 RD6/PSP6 29 32 RD7/PSP7 30 33 RE0/RD/AN5 8 9 RE1/WR/AN6 9 10 RE2/CS/AN7 12,31 13,34 6, 11,32 12,35 7, — 1,17,28, ...
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... PIC16F870/871 NOTES: DS30569B-page 10 2003 Microchip Technology Inc. ...
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... Stack Level 8 RESET Vector Interrupt Vector On-Chip Program Page 0 Memory 2003 Microchip Technology Inc. PIC16F870/871 2.2 Data Memory Organization The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 (STATUS<6>) and RP0 (STATUS< ...
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... PCLATH 18Ah 10Bh INTCON 18Bh 10Ch EECON1 18Ch 10Dh EECON2 18Dh (1) 10Eh Reserved 18Eh (1) 10Fh 18Fh Reserved 110h 190h 1A0h 120h accesses A0h - BFh 1BFh 1C0h 16Fh 1EFh 170h 1F0h accesses 70h-7Fh 17Fh 1FFh Bank 3 2003 Microchip Technology Inc. ...
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... These registers can be addressed from any bank. 5: PORTD, PORTE, TRISD and TRISE are not physically implemented on the 28-pin devices, read as ‘0’. 2003 Microchip Technology Inc. The Special Function Registers can be classified into two sets: core (CPU) and peripheral. Those registers associated with the core functions are described in detail in this section ...
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... TRMT TX9D 0000 -010 0000 -010 0000 0000 0000 0000 — — — — — — — — xxxx xxxx uuuu uuuu PCFG1 PCFG0 0--- 0000 0--- 0000 2003 Microchip Technology Inc. ...
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... Bits PSPIE and PSPIF are reserved on the 28-pin devices; always maintain these bits clear. 4: These registers can be addressed from any bank. 5: PORTD, PORTE, TRISD and TRISE are not physically implemented on the 28-pin devices, read as ‘0’. 2003 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 ...
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... See the SUBLW and SUBWF instructions for examples. R/W-0 R-1 R-1 RP1 RP0 Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-x R/W-x R/W bit Bit is unknown 2003 Microchip Technology Inc. ...
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... Prescaler is assigned to the Timer0 module bit 2-0 PS2:PS0: Prescaler Rate Select bits Bit Value 000 001 010 011 100 101 110 111 Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. PIC16F870/871 R/W-1 R/W-1 R/W-1 T0CS T0SE PSA TMR0 Rate WDT Rate ...
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... R/W-0 R/W-0 R/W-0 R/W-0 T0IE INTE RBIE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-x T0IF INTF RBIF bit Bit is unknown 2003 Microchip Technology Inc. ...
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... TMR1IE: TMR1 Overflow Interrupt Enable bit 1 = Enables the TMR1 overflow interrupt 0 = Disables the TMR1 overflow interrupt Note 1: PSPIE is reserved on the PIC16F870; always maintain this bit clear. Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. PIC16F870/871 R/W-0 R/W-0 U-0 R/W-0 RCIE ...
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... Note 1: PSPIF is reserved on the PIC16F870; always maintain this bit clear. Legend Readable bit - n = Value at POR DS30569B-page 20 R-0 R-0 U-0 R/W-0 RCIF TXIF CCP1IF W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 TMR2IF TMR1IF bit Bit is unknown 2003 Microchip Technology Inc. ...
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... Unimplemented: Read as '0' bit 4 EEIE: EEPROM Write Operation Interrupt Enable bit 1 = Enable EE write interrupt 0 = Disable EE write interrupt bit 3-0 Unimplemented: Read as '0' Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. U-0 U-0 R/W-0 U-0 — — EEIE — Writable bit U = Unimplemented bit, read as ‘ ...
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... Value at POR DS30569B-page 22 U-0 U-0 R/W-0 U-0 — — EEIF — Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared U-0 U-0 U-0 — — — bit Bit is unknown 2003 Microchip Technology Inc. ...
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... A Power-on Reset occurred (must be set in software after a Power-on Reset occurs) bit 0 BOR: Brown-out Reset Status bit Brown-out Reset occurred Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs) Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. U-0 U-0 U-0 U-0 — — — ...
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... Example 2-1. EXAMPLE 2-1: movlw movwf NEXT clrf incf btfss goto CONTINUE : INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ;to RAM INDF ;clear INDF register FSR,F ;inc pointer FSR,4 ;all done? NEXT ;no clear next ;yes continue 2003 Microchip Technology Inc. ...
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... DIRECT/INDIRECT ADDRESSING Direct Addressing RP1: RP0 6 from opcode Bank Select Location Select 00h Data (1) Memory 7Fh Bank 0 Note 1: For register file map detail see Figure 2-2. 2003 Microchip Technology Inc. 0 IRP Bank Select 80h 100h 180h FFh 17Fh 1FFh Bank 1 ...
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... PIC16F870/871 NOTES: DS30569B-page 26 2003 Microchip Technology Inc. ...
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... FLASH with an address range from 0h to 7FFh. The unused upper bits in both the EEDATH and EEDATA registers all read as ‘0’s. 2003 Microchip Technology Inc. PIC16F870/871 The value written to program memory does not need valid instruction. Therefore 14-bit numbers can be stored in memory for use as calibration param- eters, serial numbers, packed 7-bit ASCII, etc ...
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... Time-out Reset, during normal operation. U-0 U-0 U-0 R/W-x — — — WRERR W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared R/W-0 R/S-0 R/S-0 WREN WR RD bit Bit is unknown 2003 Microchip Technology Inc. ...
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... This is a sequence of five instructions that must be executed without interrup- tions. The firmware should verify that a write is not in progress before starting another cycle. 2003 Microchip Technology Inc. PIC16F870/871 The steps to write to EEPROM data memory are step 10 is not implemented, check the WR bit to see if a write is in progress ...
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... Write AAh to EECON2 in two steps (first to W, then to EECON2) • Set the WR bit 7. Execute two NOP instructions to allow the microcontroller to setup for write operation. 8. Enable interrupts (if using interrupts). 9. Clear the WREN bit to disable program operations. 2003 Microchip Technology Inc. ...
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... This should be used in appli- cations where excessive writes can stress bits near the specified endurance limits. 2003 Microchip Technology Inc. PIC16F870/871 3.8 Protection Against Spurious Writes ...
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... Value on Value on: Bit 1 Bit 0 all other POR, BOR RESETS INTF RBIF 0000 000x 0000 000u xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu WR RD x--- x000 x--- u000 — — 2003 Microchip Technology Inc. ...
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... MOVLW 0xCF ;Value used to ;initialize data ;direction MOVWF TRISA ;Set RA<3:0> as ;inputs ;RA<5:4> as outputs ;TRISA<7:6> are ;always read as '0'. 2003 Microchip Technology Inc. PIC16F870/871 FIGURE 4-1: BLOCK DIAGRAM OF RA3:RA0 AND RA5 PINS Data Bus Port Q CK Data Latch ...
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... Input/output or external clock input for Timer0. Output is open drain type. Input/output or analog input. Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 RA5 RA4 RA3 RA2 RA1 — — PCFG3 PCFG2 PCFG1 PCFG0 --0- 0000 --0- 0000 REF. Value on Value on: Bit 0 all other POR, BOR RESETS RA0 --0x 0000 --0u 0000 --11 1111 --11 1111 2003 Microchip Technology Inc. ...
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... PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>). 2003 Microchip Technology Inc. This interrupt can wake the device from SLEEP. The user, in the Interrupt Service Routine, can clear the ...
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... Bit 2 RB6 RB5 RB4 RB3 RB2 INTEDG T0CS T0SE PSA PS2 Value on Value on: Bit 1 Bit 0 all other POR, BOR RESETS RB1 RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS1 PS0 1111 1111 1111 1111 2003 Microchip Technology Inc. ...
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... SUMMARY OF REGISTERS ASSOCIATED WITH PORTC Address Name Bit 7 Bit 6 07h PORTC RC7 RC6 87h TRISC PORTC Data Direction Register Legend unknown unchanged 2003 Microchip Technology Inc. FIGURE 4-5: Port/Peripheral Select Peripheral Data Out Data Bus D WR PORT CK Data Latch D WR TRIS TRIS Latch ...
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... Q (1) I/O pin CK Data Latch D Q Schmitt CK Trigger Input TRIS Latch Buffer RD TRIS and Function Value on Value on: Bit 0 all other POR, BOR RESETS RD0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 0000 -111 0000 -111 2003 Microchip Technology Inc. ...
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... The user must make sure to keep the pins configured as inputs when using them as analog inputs. Note Power-on Reset, these pins are configured as analog inputs. 2003 Microchip Technology Inc. PIC16F870/871 FIGURE 4-7: PORTE BLOCK DIAGRAM (IN I/O PORT MODE) Data ...
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... R = Readable bit - n = Value at POR DS30569B-page 40 R-0 R/W-0 R/W-0 U-0 IBOV PSPMODE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-1 R/W-1 R/W-1 — Bit2 Bit1 Bit0 bit Bit is unknown 2003 Microchip Technology Inc. ...
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... ADCON1 ADFM — — Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PORTE. 2003 Microchip Technology Inc. Function (1) Input/output port pin or read control input in Parallel Slave Port mode or analog input Not a read operation 0 = Read operation. Reads PORTD register (if chip selected.) ...
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... BLOCK DIAGRAM (PARALLEL SLAVE PORT) Data Bus Port CK TTL Port One bit of PORTD Set Interrupt Flag PSPIF (PIR1<7>) Read Chip Select Write Note: I/O pin has protection diodes to V and V DD 2003 Microchip Technology Inc. RDx pin TTL RD TTL CS WR TTL . SS ...
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... OBF IBOV 0Ch PIR1 PSPIF ADIF RCIF 8Ch PIE1 PSPIE ADIE RCIE 9Fh ADCON1 ADFM — Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used by the Parallel Slave Port. 2003 Microchip Technology Inc Bit 4 Bit 3 Bit 2 Bit 1 — ...
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... PIC16F870/871 NOTES: DS30569B-page 44 2003 Microchip Technology Inc. ...
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... Watchdog Timer PSA WDT Enable bit Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>). 2003 Microchip Technology Inc. Counter mode is selected by setting bit T0CS (OPTION_REG<5>). In Counter mode, Timer0 will increment either on every rising, or falling edge of pin RA4/T0CKI. The incrementing edge is determined by ...
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... R/W-1 R/W-1 R/W-1 T0CS T0SE PSA 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared to Timer0, will clear the R/W-1 R/W-1 R/W-1 PS2 PS1 PS0 bit Bit is unknown 2003 Microchip Technology Inc. ...
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... Timer0 Module’s Register 0Bh,8Bh, INTCON GIE 10Bh,18Bh 81h,181h OPTION_REG RBPU INTEDG T0CS T0SE Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by Timer0. 2003 Microchip Technology Inc. Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 PEIE T0IE INTE RBIE T0IF PSA PS2 ...
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... PIC16F870/871 NOTES: DS30569B-page 48 2003 Microchip Technology Inc. ...
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... TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. In Timer mode, Timer1 increments every instruction cycle. In Counter mode, it increments on every rising edge of the external clock input. Timer1 can be enabled/disabled by setting/clearing control bit, TMR1ON (T1CON<0>). ...
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... The prescaler, however, will continue to increment. TMR1 TMR1L TMR1ON T1SYNC On/Off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock T1CKPS1:T1CKPS0 TMR1CS Synchronized 0 Clock Input 1 Synchronize det 2 Q Clock 2003 Microchip Technology Inc. ...
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... Table 6-1 shows the capacitor selection for the Timer1 oscillator. The Timer1 oscillator is identical to the LP oscillator. The user must provide a software time delay to ensure proper oscillator start-up. 2003 Microchip Technology Inc. PIC16F870/871 TABLE 6-1: CAPACITOR SELECTION FOR THE TIMER1 OSCILLATOR Osc Type Freq ...
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... CCP1IF TMR2IF TMR1IF 0000 -000 0000 -000 RCIE TXIE — CCP1IE TMR2IE TMR1IE 0000 -000 0000 -000 Value on Value on: Bit 1 Bit 0 all other POR, BOR RESETS INTF RBIF 0000 000x 0000 000u xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu 2003 Microchip Technology Inc. ...
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... T2CKPS1:T2CKPS0: Timer2 Clock Prescale Select bits 00 = Prescaler Prescaler Prescaler is 16 Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. Register 7-1 shows the Timer2 control register. Additional information on timer modules is available in the PICmicro™ Mid-Range MCU Family Reference Manual (DS33023). FIGURE 7-1: Sets Flag ...
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... CCP1IE Value on Value on: Bit 1 Bit 0 all other POR, BOR RESETS INTF RBIF 0000 000x 0000 000u TMR2IF TMR1IF 0000 -000 0000 -000 TMR2IE TMR1IE 0000 -000 0000 -000 0000 0000 0000 0000 1111 1111 1111 1111 2003 Microchip Technology Inc. ...
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... CCP1resets TMR1, and starts an A/D conversion (if A/D module is enabled) 11xx = PWM mode Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. Additional information on CCP modules is available in the PICmicro™ Mid-Range MCU Family Reference Manual (DS33023) and in application note AN594, “Using the CCP Modules” (DS00594). ...
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... EXAMPLE 8-1: CLRF CCP1CON MOVLW NEW_CAPT_PS ; Load the W reg with CCPR1L MOVWF CCP1CON TMR1L CHANGING BETWEEN CAPTURE PRESCALERS ; Turn CCP module off ; the new prescaler ; move value and CCP ON ; Load CCP1CON with this ; value 2003 Microchip Technology Inc. ...
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... Clearing the CCP1CON register will force the RC2/CCP1 compare output latch to the default low level. This is not the PORTC I/O data latch. 2003 Microchip Technology Inc. 8.3.2 TIMER1 MODE SELECTION Timer1 must be running in Timer mode, or Synchro- nized Counter mode, if the CCP module is using the compare feature ...
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... Resolution Note: If the PWM duty cycle value is longer than the PWM period, the CCP1 pin will not be cleared. • OSC (TMR2 prescale value) T • (TMR2 prescale value) OSC ( F ) OSC log F PWM = bits log(2) 2003 Microchip Technology Inc. ...
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... CCP1CON — — Legend unknown unchanged unimplemented, read as '0'. Shaded cells are not used by Capture and Timer1. Note 1: The PSP is not implemented on the PIC16F870; always maintain these bits clear. 2003 Microchip Technology Inc. 1.22 kHz 4.88 kHz 19.53 kHz 0xFFh ...
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... TMR2IF TMR1IF 0000 -000 0000 -000 TMR2IE TMR1IE 0000 -000 0000 -000 1111 1111 1111 1111 0000 0000 0000 0000 1111 1111 1111 1111 xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu 2003 Microchip Technology Inc. ...
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... TX9D: 9th bit of Transmit Data, can be parity bit Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. The USART can be configured in the following modes: • Asynchronous (full-duplex) • Synchronous - Master (half-duplex) • Synchronous - Slave (half-duplex) Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to ...
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... R = Readable bit - n = Value at POR DS30569B-page 62 R/W-0 R/W-0 R/W-0 RX9 SREN CREN ADDEN W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R-0 R-0 R-x FERR OERR RX9D bit Bit is unknown 2003 Microchip Technology Inc. ...
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... SPBRG Baud Rate Generator Register Legend unknown unimplemented, read as '0'. Shaded cells are not used by the BRG. 2003 Microchip Technology Inc. It may be advantageous to use the high baud rate (BRGH = 1), even for slower baud clocks. This is because the F OSC baud rate error in some cases. ...
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... F = 3.6864 MHz OSC SPBRG % value ERROR (decimal) 0.3 0 191 0.225 - 255 57 MHz SPBRG % value (decimal 129 255 - 0 2003 Microchip Technology Inc. ...
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... HIGH 0.977 - 255 LOW 250.000 - 0 2003 Microchip Technology Inc MHz F OSC OSC SPBRG % value ERROR KBAUD ERROR (decimal 2.441 9.615 0.16 103 9.615 19.231 ...
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... TSR register (if the TSR is empty). In such a case, an incorrect ninth data bit may be loaded in the TSR register. Data Bus TXREG Register 8 MSb LSb (8) 0 TSR Register TRMT TX9 TX9D Pin Buffer and Control RC6/TX/CK pin SPEN 2003 Microchip Technology Inc. ...
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... Shaded cells are not used for asynchronous transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear. 2003 Microchip Technology Inc. 5. Enable the transmission by setting bit TXEN, which will also set bit TXIF. ...
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... STOP Data RX9 Recovery RX9D RCREG Register RCIF Interrupt RCIE START bit7/8 STOP bit7/8 STOP bit bit0 bit bit Word 2 Word 1 RCREG RCREG FERR LSb 1 0 START FIFO 8 Data Bus START bit STOP bit7/8 bit 2003 Microchip Technology Inc. ...
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... Shaded cells are not used for asynchronous reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear. 2003 Microchip Technology Inc. 6. Flag bit RCIF will be set when reception is com- plete and an interrupt will be generated if enable bit RCIE is set ...
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... CPU. OERR CREN 64 RSR Register MSb STOP (8) Data RX9 Recovery Enable Load of Receive Buffer RX9D RCREG Register 8 RCIF Interrupt RCIE FERR LSb 0 1 START 8 8 FIFO Data Bus 2003 Microchip Technology Inc. ...
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... Baud Rate Generator Register Legend unknown unimplemented locations read as '0'. Shaded cells are not used for asynchronous reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear. 2003 Microchip Technology Inc. PIC16F870/871 START bit8 STOP ...
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... Enable the transmission by setting bit TXEN 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D. 7. Start transmission by loading data to the TXREG register using interrupts, ensure that GIE and PEIE (bits 7 and 6) of the INTCON register are set. 2003 Microchip Technology Inc. ...
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... Note: Sync Master mode; SPBRG = 0. Continuous transmission of two 8-bit words. FIGURE 9-10: SYNCHRONOUS TRANSMISSION (THROUGH TXEN) RC7/RX/DT pin RC6/TX/CK pin Write to TXREG Reg TXIF bit TRMT bit TXEN bit 2003 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 T0IE INTE RBIE T0IF ...
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... Read the 8-bit received data by reading the RCREG register. 10. If any error occurred, clear the error by clearing bit CREN. 11. If using interrupts, ensure that GIE and PEIE (bits 7 and 6) of the INTCON register are set. 2003 Microchip Technology Inc. ...
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... RC6/TX/CK pin Write to bit SREN SREN bit '0' CREN bit RCIF bit (Interrupt) Read RXREG Note: Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRG = 0. 2003 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 T0IE INTE RBIE T0IF INTF ...
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... TRMT Value on Value on: Bit 0 all other POR, BOR RESETS R0IF 0000 000x 0000 000u 0000 -000 RX9D 0000 000x 0000 000x 0000 0000 0000 0000 0000 -000 TX9D 0000 -010 0000 -010 0000 0000 0000 0000 2003 Microchip Technology Inc. ...
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... Shaded cells are not used for synchronous slave reception. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F870, always maintain these bits clear. 2003 Microchip Technology Inc. When setting up a Synchronous Slave Reception, follow these steps: 1 ...
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... PIC16F870/871 NOTES: DS30569B-page 78 2003 Microchip Technology Inc. ...
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... A/D converter module is shut-off and consumes no operating current Note 1: These channels are not available on the PIC16F870 device. Legend Readable bit - n = Value at POR 2003 Microchip Technology Inc. PIC16F870/871 The A/D module has four registers. These registers are: • A/D Result High Register (ADRESH) • ...
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... R/W-0 R/W-0 PCFG2 PCFG1 PCFG0 bit 0 AN1 AN0 C HAN REF REF (2) RA1 RA0 Refs 8 RA3 RA3 RA3 RA3 RA2 6 6 RA3 V 5 RA3 RA2 4 RA3 RA2 3 RA3 RA2 2 1 RA3 RA2 1 Bit is unknown 2003 Microchip Technology Inc. / ...
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... REF (Reference Voltage) V REF (Reference Voltage) Note 1: Not available on the PIC16F870 device. 2003 Microchip Technology Inc. 3. Wait the required acquisition time. 4. Start conversion: • Set GO/DONE bit (ADCON0) 5. Wait for A/D conversion to complete, by either: • Polling for the GO/DONE bit to be cleared (with interrupts enabled) ...
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... HOLD delay must complete before acquisition can begin again Sampling Switch LEAKAGE V = 0.6V T ± 500 the minimum acquisition time, , see ACQ SS C HOLD = DAC capacitance = 120 Sampling Switch (k ) 2003 Microchip Technology Inc. ...
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... If the TRIS bit is cleared (output), the digital output level ( will be converted The A/D operation is independent of the state of the CHS2:CHS0 bits and the TRIS bits. 2003 Microchip Technology Inc. PIC16F870/871 For correct A/D conversions, the A/D conversion clock (T ) must be selected to ensure a minimum 1 The ...
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... The extra bits are loaded with ‘0’. When an A/D result will not overwrite these locations (A/D disable), these registers may be used as two general purpose 8-bit registers. 10-bit Result 0 7 ADRESH 10-bit Result wait, acquisition AD and a maximum ADFM = 0000 00 ADRESL Left Justified 2003 Microchip Technology Inc. ...
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... Shaded cells are not used for A/D conversion. Note 1: These registers/bits are not available on the 28-pin devices. 2003 Microchip Technology Inc. Turning off the A/D places the A/D module in its lowest current consumption state. Note: ...
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... PIC16F870/871 NOTES: DS30569B-page 86 2003 Microchip Technology Inc. ...
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... It is designed to keep the part in RESET while the power supply stabilizes. With these two timers on-chip, most applications need no external RESET circuitry. 2003 Microchip Technology Inc. PIC16F870/871 SLEEP mode is designed to offer a very low current Power-down mode. The user can wake-up from SLEEP through external RESET, Watchdog Timer Wake-up, or through an interrupt ...
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... PWRTEN. Ensure the Power-up Timer is enabled any time Brown-out Reset is enabled. DS30569B-page 88 (1) CP1 CP0 PWRTEN WDTEN FOSC1 FOSC0 (2) (3) ( Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared bit Bit is unknown 2003 Microchip Technology Inc. ...
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... See Table 11-1 and Table 11-2 for recommended values of C1 and C2 series resistor (R ) may be required for s AT strip cut crystals varies with the crystal chosen. 2003 Microchip Technology Inc. FIGURE 11-2: Clock from Ext. System TABLE 11-1: Mode XT HS 16.0 MHz These values are for design guidance only ...
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... PPM R EXT ± 20 PPM ± 50 PPM C EXT ± 50 PPM V SS ± 30 PPM ± 30 PPM F Recommended values ® ) values, and the operat- EXT RC OSCILLATOR MODE Internal OSC1 Clock PIC16F870/871 OSC2/CLKO /4 OSC R 100 k EXT C > 20pF EXT 2003 Microchip Technology Inc. ...
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... On-chip 10-bit Ripple Counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKI pin. 2003 Microchip Technology Inc. PIC16F870/871 SLEEP, and Brown-out Reset (BOR). They are not affected by a WDT Wake-up, which is viewed as the resumption of normal operation. The TO and PD bits are set or cleared differently in different RESET situa- tions, as indicated in Table 11-4 ...
Page 94
... OSC — falls below V DD BOR BOR falls below V for less DD BOR rises above V . The DD BOR should fall DD during T , the Brown-out Reset pro- PWRT rises above V with the DD BOR Wake-up from SLEEP 1024 T OSC OSC — 2003 Microchip Technology Inc. ...
Page 95
... STATUS PIC16F870 PIC16F871 FSR PIC16F870 PIC16F871 PORTA PIC16F870 PIC16F871 PORTB PIC16F870 PIC16F871 PORTC PIC16F870 PIC16F871 PORTD PIC16F870 PIC16F871 PORTE PIC16F870 PIC16F871 PCLATH PIC16F870 PIC16F871 INTCON PIC16F870 PIC16F871 Legend unchanged unknown unimplemented bit, read as '0 value depends on condition reserved, maintain clear Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up) ...
Page 96
... PIC16F870 PIC16F871 TRISC PIC16F870 PIC16F871 TRISD PIC16F870 PIC16F871 TRISE PIC16F870 PIC16F871 PIE1 PIC16F870 PIC16F871 PIC16F870 PIC16F871 PIE2 PIC16F870 PIC16F871 PCON PIC16F870 PIC16F871 PR2 PIC16F870 PIC16F871 TXSTA PIC16F870 PIC16F871 SPBRG PIC16F870 PIC16F871 ADRESL PIC16F870 PIC16F871 ADCON1 PIC16F870 PIC16F871 EEDATA PIC16F870 PIC16F871 EEADR ...
Page 97
... V DD MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 11-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 2003 Microchip Technology Inc. PIC16F870/871 DD T PWRT T OST T PWRT T OST T PWRT T OST ) ): CASE 1 ...
Page 98
... The exact latency depends when the interrupt event occurs. The latency is the same for one or two-cycle instructions. Individual interrupt flag bits are set, regardless of the status of their corresponding mask bit, PEIE bit, or GIE bit. 2003 Microchip Technology Inc. ...
Page 99
... SLEEP. The status of global interrupt enable bit, GIE, decides whether or not the processor branches to the interrupt vector following wake-up. See Section 11.13 for details on SLEEP mode. 2003 Microchip Technology Inc. T0IF T0IE INTF INTE RBIF ...
Page 100
... PIC16F870/871 devices, temporary holding regis- ters W_TEMP, STATUS_TEMP, and PCLATH_TEMP should be placed in here. These 16 locations don’t require banking and therefore, make it easier for con- text save and restore. The same code shown in Example 11-1 can be used. 2003 Microchip Technology Inc. ...
Page 101
... Shaded cells are not used by the Watchdog Timer. Note 1: See Register 11-1 for operation of these bits. 2003 Microchip Technology Inc. WDT time-out period values may be found in the Elec- trical Specifications section under parameter #31. Val- ues for the WDT prescaler (actually a postscaler, but shared with the Timer0 prescaler) may be assigned using the OPTION_REG register ...
Page 102
... SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruction should be executed before a SLEEP instruction. 2003 Microchip Technology Inc. ...
Page 103
... To use the In-Circuit Debugger function of the micro- controller, the design must implement In-Circuit Serial Programming connections to MCLR/V RB7 and RB6. This will interface to the In-Circuit Debugger module available from Microchip, or one of the third party development tool companies. 2003 Microchip Technology Inc OST (2) T Interrupt Latency Processor in ...
Page 104
... For all other cases of low voltage ICSP, the part may be programmed at the normal oper- ating voltage. This means calibration values, unique user IDs, or user code can be reprogrammed or added. to the IHH to other PIC16CXXX on IHH 2003 Microchip Technology Inc. ...
Page 105
... Byte-oriented operations • Bit-oriented operations • Literal and control operations 2003 Microchip Technology Inc. PIC16F870/871 All instructions are executed within one single instruc- tion cycle, unless a conditional test is true, or the pro- gram counter is changed as a result of an instruction. ...
Page 106
... TO,PD 0000 0110 0100 1kkk kkkk kkkk Z 1000 kkkk kkkk 00xx kkkk kkkk 0000 0000 1001 01xx kkkk kkkk 0000 0000 1000 TO,PD 0000 0110 0011 C,DC,Z 110x kkkk kkkk Z 1010 kkkk kkkk 2003 Microchip Technology Inc. ...
Page 107
... Operation: (W) .AND. (f) (destination) Status Affected: Z Description: AND the W register with register 'f the result is stored in the W register the result is stored back in register 'f'. 2003 Microchip Technology Inc. BCF k Syntax: Operands: Operation: Status Affected: Description: BSF Syntax: f,d Operands: Operation: Status Affected: ...
Page 108
... Z The contents of register 'f' are complemented the result is stored ' the result is stored back in register 'f'. Decrement f [ label ] DECF f 127 d [0,1] ( (destination) Z Decrement register 'f the result is stored in the W register the result is stored back in register 'f'. 2003 Microchip Technology Inc. ...
Page 109
... Operation: ( (destination) Status Affected: Z Description: The contents of register 'f' are incremented the result is placed in the W register the result is placed back in register 'f'. 2003 Microchip Technology Inc. PIC16F870/871 INCFSZ Increment f, Skip if 0 Syntax: [ label ] INCFSZ f,d Operands 127 d [0,1] Operation: ( (destination), ...
Page 110
... TOS PC, 1 GIE None Return with Literal label ] RETLW 255 k (W); TOS PC None The W register is loaded with the eight-bit literal 'k'. The program counter is loaded from the top of the stack (the return address). This is a two-cycle instruction. 2003 Microchip Technology Inc. ...
Page 111
... Description: The contents of register 'f' are rotated one bit to the right through the Carry Flag the result is placed in the W register the result is placed back in register 'f'. C Register f 2003 Microchip Technology Inc. PIC16F870/871 SLEEP Syntax: [ label ] SLEEP Operands: None Operation: 00h WDT, ...
Page 112
... DS30569B-page 110 XORWF Exclusive OR W with f Syntax: [ label ] XORWF Operands 127 d [0,1] Operation: (W) .XOR. (f) destination) Status Affected: Z Description: Exclusive OR the contents of the W register with register 'f the result is stored in the W register the result is stored back in register 'f'. 2003 Microchip Technology Inc. f,d ...
Page 113
... OQ - PICDEM MSC ® - microID - CAN ® - PowerSmart - Analog 2003 Microchip Technology Inc. PIC16F870/871 13.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market. The MPLAB IDE is a Windows based application that contains: • ...
Page 114
... MPLAB C30 C Compiler and MPLAB ASM30 assembler. The simulator runs in either a Command Line mode for automated tasks, or from MPLAB IDE. This high speed simulator is designed to debug, analyze and optimize time intensive DSP routines. 2003 Microchip Technology Inc. software ...
Page 115
... The PC platform and Microsoft Windows 32-bit operating system were cho- sen to best make these features available in a simple, unified application. 2003 Microchip Technology Inc. PIC16F870/871 13.11 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low cost, run-time development tool, connecting to the host PC via an RS-232 or high speed USB interface ...
Page 116
... PICSTART Plus development pro- grammer, can be used to reprogram the device for user tailored application development. The PICDEM 17 demonstration board supports program download and execution from external on-board FLASH memory. A generous prototype area is available for user hardware expansion. 2003 Microchip Technology Inc. ...
Page 117
... Tricks for 8-pin FLASH PIC Microcontrollers" Handbook and a USB Interface Cable. Supports all current 8/14-pin FLASH PIC microcontrollers, as well as many future planned devices. 2003 Microchip Technology Inc. PIC16F870/871 13.23 PICDEM USB PIC16C7X5 Demonstration Board The PICDEM USB Demonstration Board shows off the capabilities of the PIC16C745 and PIC16C765 USB microcontrollers ...
Page 118
... PIC16F870/871 NOTES: DS30569B-page 116 2003 Microchip Technology Inc. ...
Page 119
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2003 Microchip Technology Inc. (except V , MCLR. and RA4) ......................................... -0. (Note 2) ...
Page 120
... PICmicro DDAPPMIN Note 2: F has a maximum frequency of 10 MHz. MAX DS30569B-page 118 20 MHz Frequency 4 MHz 10 MHz 20 MHz Frequency – 2.0V MHz; V DDAPPMIN DDAPPMIN – 3.0V MHz; V DDAPPMIN DDAPPMIN ® device in the application. = 2.0V - 3.0V = 3.0V - 4.0V 2003 Microchip Technology Inc. ...
Page 121
... The current is the additional current consumed when this peripheral is enabled. This current should be added to the base When BOR is enabled, the device will operate correctly until the V 2003 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating temperature -40° 0° Standard Operating Conditions (unless otherwise stated) Operating temperature -40° ...
Page 122
... Industrial +70°C for Commercial +85°C for Industrial +125°C for Extended Conditions = 4 MHz 3.0V (Note kHz 3.0V, WDT disabled MHz 5.5V (Note MHz 5.5V MHz 5.5V, - +125 5. 5. and voltage trip point is reached. 2003 Microchip Technology Inc. ...
Page 123
... The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. 2003 Microchip Technology Inc. PIC16F870/871 Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C T +85° ...
Page 124
... Using EECON to read/write MIN V — 1000 — — E — 5 MIN V — 5.5 V Using EECON to read/write, MIN V — Conditions = 8.5 mA 4.5V 1.6 mA 4.5V -3.0 mA 4.5V -1.3 mA 4.5V min operating voltage MIN = min operating voltage MIN = min operating voltage MIN 2003 Microchip Technology Inc. ...
Page 125
... The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. 2003 Microchip Technology Inc. PIC16F870/871 Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C Operating voltage V ...
Page 126
... V Using EECON to read/write, MIN V MIN — 1000 — — E — 5 MIN MIN V — 5.5 V Using EECON to read/write, MIN V MIN — 2003 Microchip Technology Inc. Conditions = 4. 4. -2 -1 min. operating voltage = min operating voltage = min. operating voltage ...
Page 127
... Uppercase letters and their meanings Fall H High I Invalid (Hi-impedance) L Low only AA output access BUF Bus free specifications only Hold ST DAT DATA input hold STA START condition 2003 Microchip Technology Inc. PIC16F870/871 specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI ...
Page 128
... OSC2, but including PORTD and PORTE outputs as ports for OSC2 output Note: PORTD and PORTE are not implemented on the PIC16F870. FIGURE 14-4: EXTERNAL CLOCK TIMING Q4 OSC1 CLKO DS30569B-page 126 Load condition Pin 2003 Microchip Technology Inc. ...
Page 129
... All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. 2003 Microchip Technology Inc. Min Typ† ...
Page 130
... (Note 1) CY — — ns (Note 1) — — ns (Note 1) 100 255 ns — — ns — — ns — — — 145 — 145 ns — — ns — — ns 2003 Microchip Technology Inc. ...
Page 131
... T Brown-out Reset pulse width BOR * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2003 Microchip Technology Inc. PIC16F870/871 BOR 35 Min Typ† ...
Page 132
... Greater of: — Extended(LF) Greater of Standard(F) 60 — Extended(LF) 100 — DC — — OSC 2003 Microchip Technology Inc. 48 Conditions — ns Must also meet parameter 42 — ns — ns Must also meet parameter 42 — ns — ns — prescale value (2, 4, ..., 256) — ns Must also meet parameter 47 — ...
Page 133
... TccF CCP1 output fall time * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2003 Microchip Technology Inc Min No Prescaler 0.5 T ...
Page 134
... FIGURE 14-10: PARALLEL SLAVE PORT TIMING (PIC16F871 ONLY) RE2/CS RE0/RD RE1/WR RD7:RD0 64 Note: Refer to Figure 14-3 for load conditions. TABLE 14-6: PARALLEL SLAVE PORT REQUIREMENTS (PIC16F871 ONLY) Param Sym No. 62 TdtV2wrH Data in valid before (setup time) 63* TwrH2dtI data–in invalid (hold time) Standard(F) ...
Page 135
... SYNC RCV (MASTER & SLAVE) Data setup before CK 126 TckL2dtl Data hold after CK † Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. 2003 Microchip Technology Inc. PIC16F870/871 121 Characteristic Min Standard(F) Extended(LF) Standard(F) ...
Page 136
... AIN REF — AIN REF V V Must meet spec. A20 V Must meet spec. A20 Average current consumption when A (Note 1 During V acquisition. AIN Based on differential of V HOLD charge C , see AIN HOLD Section 10.1. A During A/D Conversion cycle 2003 Microchip Technology Inc. ...
Page 137
... Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. § This specification ensured by design. Note 1: ADRES register may be read on the following T 2: See Section 10.1 for min conditions. 2003 Microchip Technology Inc. (1) 131 130 OLD_DATA SAMPLING STOPPED is added before the A/D clock starts ...
Page 138
... PIC16F870/871 NOTES: DS30569B-page 136 2003 Microchip Technology Inc. ...
Page 139
... Minimum: mean – 3 (-40°C to 125° FIGURE 15-2: MAXIMUM Typical: statistical mean @ 25°C 7 Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125° 2003 Microchip Technology Inc. OVER V (HS MODE) OSC vs. F OVER V (HS MODE) OSC ...
Page 140
... F (MHz) OSC vs. F OVER V (LP MODE) OSC DD 1.5 2.0 2.5 F (MHz) OSC 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 3.0 3.5 4.0 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 3.0 3.5 4.0 2003 Microchip Technology Inc. ...
Page 141
... FIGURE 15-6: MAXIMUM I DD 120 110 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) 100 2003 Microchip Technology Inc. OVER V (LP MODE) OSC ( vs. F OVER V (XT MODE) OSC ( OSC PIC16F870/871 5.5V 5 ...
Page 142
... DS30569B-page 140 vs. V FOR VARIOUS VALUES OF R (RC MODE pF 3.3k 5.1k 10k 100k 3.0 3.5 4.0 V (V) DD vs. V FOR VARIOUS VALUES OF R (RC MODE 100 pF 3.0 3.5 4 4.5 5.0 5.5 3 100 k 4.5 5.0 5.5 2003 Microchip Technology Inc. ...
Page 143
... Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) 10.00 1.00 0.10 0.01 2.0 2.5 2003 Microchip Technology Inc. vs. V FOR VARIOUS VALUES OF R (RC MODE 300 pF 3.0 3.5 4 Max (125C) ...
Page 144
... TMR1 DD Max Ty p (25C) 3.0 3.5 4 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) Device in SLEEP Max SLEEP Typ SLEEP (25°C) 4.5 5.0 5.5 4.5 5.0 5.5 2003 Microchip Technology Inc. ...
Page 145
... FIGURE 15-14: TYPICAL, MINIMUM AND MAXIMUM WDT PERIOD vs 2.0 2.5 2003 Microchip Technology Inc. vs. V OVER TEMPERATURE WDT DD 3.0 3.5 4.0 V (V) DD Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) ...
Page 146
... OVER TEMPERATURE (- 125 C) DD Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) 3.0 3.5 4.0 V ( Max (-40C) Typ (25C) Min (125C (-mA) OH 4.5 5.0 5 5V, - 125 2003 Microchip Technology Inc. ...
Page 147
... Minimum: mean – 3 (-40°C to 125°C) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2003 Microchip Technology Inc. vs Max (-40C) Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) Minimum: mean – 3 (-40°C to 125°C) Typ (25C) Min (125C) 10 ...
Page 148
... Minimum: mean – 3 (-40°C to 125°C) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.0 2.5 DS30569B-page 146 vs Max (125C) Typ (25C) Min (-40C (-mA (TTL INPUT, - 125 Max (-40C) Min (125C) 3.0 3.5 4 3V, - 125 4.5 5.0 5.5 2003 Microchip Technology Inc. ...
Page 149
... MINIMUM AND MAXIMUM V 3.5 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to 125°C) 3.0 Minimum: mean – 3 (-40°C to 125°C) 2.5 2.0 1.5 1.0 0.5 0.0 2.0 2.5 2003 Microchip Technology Inc. vs. V (ST INPUT, - 125 3.0 3.5 4 ...
Page 150
... PIC16F870/871 NOTES: DS30569B-page 148 2003 Microchip Technology Inc. ...
Page 151
... Standard PICmicro device marking consists of Microchip part number, year code, week code, and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2003 Microchip Technology Inc. PIC16F870/871 Example PIC16F870-I/SP ...
Page 152
... Package Marking Information (Cont’d) 40-Lead PDIP XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXXXX YYWWNNN 44-Lead TQFP XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN 44-Lead PLCC XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX YYWWNNN DS30569B-page 150 Example PIC16F871-I/P 0312017 Example PIC16F871 -I/PT 0320017 Example PIC16F871 -I/L 0320017 2003 Microchip Technology Inc. ...
Page 153
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimension D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-095 Drawing No. C04-070 2003 Microchip Technology Inc Units INCHES* MIN NOM ...
Page 154
... A2 MILLIMETERS MIN NOM MAX 28 1.27 2.36 2.50 2.64 2.24 2.31 2.39 0.10 0.20 0.30 10.01 10.34 10.67 7.32 7.49 7.59 17.65 17.87 18.08 0.25 0.50 0.74 0.41 0.84 1. 0.23 0.28 0.33 0.36 0.42 0. 2003 Microchip Technology Inc. ...
Page 155
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-150 Drawing No. C04-073 2003 Microchip Technology Inc Units INCHES ...
Page 156
... L p MILLIMETERS MIN NOM MAX 40 2.54 4.06 4.45 4.83 3.56 3.81 4.06 0.38 15.11 15.24 15.88 13.46 13.84 14.22 51.94 52.26 52.45 3.05 3.30 3.43 0.20 0.29 0.38 0.76 1.27 1.78 0.36 0.46 0.56 15.75 16.51 17. 2003 Microchip Technology Inc. ...
Page 157
... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D1 and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-026 Drawing No. C04-076 2003 Microchip Technology Inc ...
Page 158
... Microchip Technology Inc. ...
Page 159
... Microchip Technology Inc. PIC16F870/871 APPENDIX B: DEVICE DIFFERENCES The differences between the devices listed in this data sheet are shown in Table B-1. PIC16F870 2K 128 2048 Yes Ports 28-pin DIP, SOIC, SSOP 40-pin PDIP, 44-pin PLCC, TQFP PIC16F871 2K 128 512 No Ports DS30569B-page 157 ...
Page 160
... MCU devices (i.e., PIC16CXXX) and the enhanced devices (i.e., PIC18FXXX) is provided in AN716, “Migrating Designs from PIC16C74A/74B to PIC18C442.” The changes discussed, while device specific, are generally applicable to all mid-range to enhanced device migrations. This Application Note is available as Literature Number DS00716. 2003 Microchip Technology Inc. ...
Page 161
... A detailed discussion of the migration pathway and dif- ferences between the high-end MCU devices (i.e., PIC17CXXX) and the enhanced PIC18FXXXX) is provided in AN726, “PIC17CXXX to PIC18CXXX Migration.” This Application Note is available as Literature Number DS00726. 2003 Microchip Technology Inc. devices (i.e., PIC16F870/871 DS30569B-page 159 ...
Page 162
... PIC16F870/871 NOTES: DS30569B-page 160 2003 Microchip Technology Inc. ...
Page 163
... A/D .............................................................................. 81 Analog Input Model ..................................................... 82 Capture Mode Operation ............................................ 56 Compare Mode Operation .......................................... 57 Interrupt Logic ............................................................. 97 On-Chip RESET Circuit .............................................. 91 PIC16F870.................................................................... 5 PIC16F871.................................................................... 6 PORTC (Peripheral Output Override) ......................... 37 PORTD (In I/O Port Mode).......................................... 38 PORTD and PORTE (Parallel Slave Port) .................. 42 PORTE (In I/O Port Mode).......................................... 39 PWM Mode ................................................................. 58 RA3:RA0 and RA5 Pins .............................................. 33 RA4/T0CKI Pin ...
Page 164
... GIE Bit ........................................................................ 18 INTE Bit ...................................................................... 18 INTF Bit ...................................................................... 18 PEIE Bit ...................................................................... 18 RBIE Bit ...................................................................... 18 RBIF Bit ................................................................ 18, 35 T0IE Bit ....................................................................... 18 Internal Sampling Switch (Rss) Impedance........................ 82 Interrupt Sources .......................................................... 87, 96 Interrupt-on-Change (RB7:RB4) ................................. 35 RB0/INT Pin, External................................................. 97 TMR0 Overflow........................................................... 97 USART Receive/Transmit Complete .......................... 61 Interrupts, Context Saving During....................................... 98 2003 Microchip Technology Inc. ...
Page 165
... BOR Bit....................................................................... 23 POR Bit....................................................................... 23 PICkit 1 FLASH Starter Kit................................................ 115 PICSTART Plus Development Programmer..................... 113 PIE1 Register ............................................................... 14, 15 PIE2 Register ............................................................... 14, 15 Pinout Descriptions PIC16F870 ................................................................... 7 PIC16F871 ................................................................... 8 PIR1 Register ..................................................................... 13 PIR2 Register ..................................................................... 13 POP .................................................................................... 24 POR. See Power-on Reset. PORTA ............................................................................. 7, 8 Associated Registers.................................................. 34 PORTA Register......................................................... 33 RA0/AN0 Pin ............................................................ 7, 8 RA1/AN1 Pin ...
Page 166
... SLEEP .................................................................. 87, 91, 100 Software Simulator (MPLAB SIM) .................................... 112 Software Simulator (MPLAB SIM30) ................................ 112 SPBRG ............................................................................... 15 SPBRG Register................................................................. 14 Special Features of the CPU .............................................. 87 Special Function Registers ................................................. 13 Special Function Register Summary .......................... 13 Speed, Operating.................................................................. 1 SSPADD Register............................................................... 15 SSPSTAT Register ............................................................. 15 Stack................................................................................... 24 Overflows.................................................................... 24 Underflow ................................................................... 24 2003 Microchip Technology Inc. ...
Page 167
... Timing Diagrams A/D Conversion......................................................... 135 Asynchronous Master Transmission........................... 67 Asynchronous Master Transmission (Back to Back) .................................................... 67 Asynchronous Reception with Address Byte First .............................................. 71 2003 Microchip Technology Inc. PIC16F870/871 Asynchronous Reception with Address Detect ................................................... 71 Brown-out Reset....................................................... 129 Capture/Compare/PWM (CCP1) .............................. 131 CLKO and I/O ........................................................... 128 External Clock .......................................................... 126 Parallel Slave Port (PSP) Read ...
Page 168
... Watchdog Timer (WDT)................................................ 87, 99 Enable (WDTEN Bit)................................................... 99 Postscaler. See Postscaler, WDT. Programming Considerations ..................................... 99 RC Oscillator............................................................... 99 Time-out Period .......................................................... 99 WDT Reset, Normal Operation............................. 91, 93 WDT Reset, SLEEP.............................................. 91, 93 Write Verify Data EEPROM and FLASH Program Memory ........... 31 WWW, On-Line Support ....................................................... 4 2003 Microchip Technology Inc. ...
Page 169
... Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events 2003 Microchip Technology Inc. SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...
Page 170
... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS30569B-page 168 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS30569B 2003 Microchip Technology Inc. ...
Page 171
... DD d) range 2.0V to 5.5V DD limits limits DD PIC16F870/871 PIC16F870-I/SP 301 = Industrial temp., PDIP package, 20 MHz, normal V limits, QTP DD pattern #301. PIC16F871-I/PT = Industrial temp., TQFP package, 20 MHz, Extended V limits. DD PIC16F871-I/P = Industrial temp., PDIP package, 20 MHz, normal V limits. DD PIC16LF870-I/SS = Industrial temp., SSOP package MHz, extended V limits ...
Page 172
... Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy Microchip Technology SRL Via Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 United Kingdom Microchip Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 03/25/03 2003 Microchip Technology Inc. ...