PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 26

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PIC12F683-I/SN

Manufacturer Part Number
PIC12F683-I/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/SN

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC12F683
3.5.2.1
The HFINTOSC is factory calibrated but can be
adjusted in software by writing to the OSCTUNE
register (Register 3-2).
The default value of the OSCTUNE register is ‘0’. The
value is a 5-bit two’s complement number.
REGISTER 3-2:
DS41211C-page 24
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
U-0
OSCTUNE Register
Unimplemented: Read as ‘0’
TUN<4:0>: Frequency Tuning bits
01111 = Maximum frequency
01110 =
00001 =
00000 = Oscillator module is running at the calibrated frequency.
11111 =
10000 = Minimum frequency
U-0
OSCTUNE: OSCILLATOR TUNING REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
R/W-0
TUN4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
When the OSCTUNE register is modified, the
HFINTOSC frequency will begin shifting to the new
frequency. Code execution continues during this shift.
There is no indication that the shift has occurred.
OSCTUNE does not affect the LFINTOSC frequency.
Operation of features that depend on the LFINTOSC
clock source frequency, such as the Power-up Timer
(PWRT), Watchdog Timer (WDT), Fail-Safe Clock
Monitor (FSCM) and peripherals, are not affected by the
change in frequency.
TUN3
R/W-0
TUN2
© 2006 Microchip Technology Inc.
x = Bit is unknown
R/W-0
TUN1
R/W-0
TUN0
bit 0

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