PIC12F683-I/SN Microchip Technology Inc., PIC12F683-I/SN Datasheet - Page 73

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PIC12F683-I/SN

Manufacturer Part Number
PIC12F683-I/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC12F683-I/SN

A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
10.0
The EEPROM data memory is readable and writable
during normal operation (full V
is not directly mapped in the register file space.
Instead, it is indirectly addressed through the Special
Function Registers. There are four SFRs used to read
and write this memory:
• EECON1
• EECON2 (not a physically implemented register)
• EEDAT
• EEADR
EEDAT holds the 8-bit data for read/write, and EEADR
holds the address of the EEPROM location being
accessed. PIC12F683 has 256 bytes of data EEPROM
with an address range from 0h to FFh.
REGISTER 10-1:
REGISTER 10-2:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
EEADR7
EEDAT7
R/W-0
R/W-0
DATA EEPROM MEMORY
EEDATn: Byte Value to Write To or Read From Data EEPROM bits
EEADR: Specifies One of 256 Locations for EEPROM Read/Write Operation bits
EEADR6
EEDAT6
R/W-0
R/W-0
EEDAT: EEPROM DATA REGISTER
EEADR: EEPROM ADDRESS REGISTER
DD
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
EEADR5
range). This memory
EEDAT5
R/W-0
R/W-0
EEADR4
EEDAT4
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EEADR3
EEDAT3
R/W-0
R/W-0
The EEPROM data memory allows byte read and write.
A byte write automatically erases the location and
writes the new data (erase before write). The EEPROM
data memory is rated for high erase/write cycles. The
write time is controlled by an on-chip timer. The write
time will vary with voltage and temperature as well as
from chip-to-chip. Please refer to AC Specifications in
Section 15.0 “Electrical Specifications” for exact
limits.
When the data memory is code-protected, the CPU
may continue to read and write the data EEPROM
memory. The device programmer can no longer access
the data EEPROM data and will read zeroes.
EEADR2
EEDAT2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
PIC12F683
EEADR1
EEDAT1
R/W-0
R/W-0
DS41211C-page 71
EEADR0
EEDAT0
R/W-0
R/W-0
bit 0
bit 0

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