PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 238
PIC18F6621-I/PT
Manufacturer Part Number
PIC18F6621-I/PT
Description
64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F6621-IPT.pdf
(396 pages)
Specifications of PIC18F6621-I/PT
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
54
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
3.8K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6621-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F6621-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC18F6525/6621/8525/8621
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(V
V
The A/D converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter which generates the result via successive
approximation.
FIGURE 20-1:
DS39612B-page 236
REF
DD
+ pin and RA2/AN2/V
and V
Note 1:
SS
), or the voltage level on the RA3/AN3/
2:
Converter
10-bit
A/D
Channels AN15 through AN12 are not available on PIC18F6525/6621 devices.
I/O pins have diode protection to V
Reference
Voltage
A/D BLOCK DIAGRAM
REF
- pin.
V
V
REF
REF
+
-
(Input Voltage)
VCFG1:VCFG0
V
AIN
DD
and V
AV
DD
SS
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted.
Each port pin associated with the A/D converter can be
configured as an analog input (RA3 can also be a
voltage reference), or as a digital I/O. The ADRESH
and ADRESL registers contain the result of the A/D
conversion. When the A/D conversion is complete, the
result is loaded into the ADRESH/ADRESL registers,
the GO/DONE bit (ADCON0 register) is cleared and A/D
interrupt flag bit, ADIF, is set. The block diagram of the
A/D module is shown in Figure 20-1.
.
AV
SS
CHS3:CHS0
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
2005 Microchip Technology Inc.
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
(1)
(1)
(1)
(1)
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