DSPIC30F2012-20I/SP Microchip Technology Inc., DSPIC30F2012-20I/SP Datasheet - Page 44
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DSPIC30F2012-20I/SP
Manufacturer Part Number
DSPIC30F2012-20I/SP
Description
16 BIT MCU/DSP 28LD 20MIPS 12 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F2012-20ISP.pdf
(204 pages)
Specifications of DSPIC30F2012-20I/SP
A/d Inputs
10-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
0 Bytes
Input Output
20
Interface
I2C/SPI/UART, USART
Ios
20
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SPDIP
Programmable Memory
12K Bytes
Ram Size
1K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F2012-20I/SP
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DSPIC30F2012-20I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F2011/2012/3012/3013
4.1.3
Move instructions and the DSP accumulator class of
instructions provide a greater degree of addressing
flexibility than other instructions. In addition to the
addressing modes supported by most MCU instruc-
tions, move and accumulator instructions also support
Register Indirect with Register Offset Addressing
mode, also referred to as Register Indexed mode.
In summary, the following addressing modes are
supported by move and accumulator instructions:
• Register Direct
• Register Indirect
• Register Indirect Post-modified
• Register Indirect Pre-modified
• Register Indirect with Register Offset (Indexed)
• Register Indirect with Literal Offset
• 8-bit Literal
• 16-bit Literal
4.1.4
The dual source operand DSP instructions (CLR, ED,
EDAC, MAC, MPY, MPY.N, MOVSAC and MSC), also
referred to as MAC instructions, utilize a simplified set of
addressing modes to allow the user to effectively
manipulate the data pointers through register indirect
tables.
The two source operand prefetch registers must belong
to the set {W8, W9, W10, W11}. For data reads, W8
and W9 are always directed to the X RAGU. W10 and
W11 are always directed to the Y AGU. The effective
addresses generated (before and after modification)
must, therefore, be valid addresses within X data space
for W8 and W9 and Y data space for W10 and W11.
DS70139D-page 42
Note:
Note:
Note:
MOVE AND ACCUMULATOR
INSTRUCTIONS
For the MOV instructions, the addressing
mode specified in the instruction can differ
for the source and destination EA.
However, the 4-bit Wb (register offset)
field is shared between both source and
destination (but typically only used by
one).
Not all instructions support all the address-
ing
instructions may support different subsets
of these addressing modes.
MAC INSTRUCTIONS
Register Indirect with Register Offset
addressing is only available for W9 (in X
space) and W11 (in Y space).
modes
given
above.
Individual
In summary, the following addressing modes are
supported by the MAC class of instructions:
• Register Indirect
• Register Indirect Post-modified by 2
• Register Indirect Post-modified by 4
• Register Indirect Post-modified by 6
• Register Indirect with Register Offset (Indexed)
4.1.5
Besides the various addressing modes outlined above,
some instructions use literal constants of various sizes.
For example, BRA (branch) instructions use 16-bit
signed literals to specify the branch destination directly,
whereas the DISI instruction uses a 14-bit unsigned
literal field. In some instructions, such as ADD Acc, the
source of an operand or result is implied by the opcode
itself. Certain operations, such as NOP, do not have any
operands.
4.2
Modulo Addressing is a method of providing an auto-
mated means to support circular data buffers using
hardware. The objective is to remove the need for soft-
ware to perform data address boundary checks when
executing tightly looped code, as is typical in many
DSP algorithms.
Modulo Addressing can operate in either data or pro-
gram space (since the data pointer mechanism is
essentially the same for both). One circular buffer can
be supported in each of the X (which also provides the
pointers into program space) and Y data spaces. Mod-
ulo Addressing can operate on any W register pointer.
However, it is not advisable to use W14 or W15 for Mod-
ulo Addressing since these two registers are used as
the Stack Frame Pointer and Stack Pointer, respec-
tively.
In general, any particular circular buffer can only be
configured to operate in one direction, as there are cer-
tain restrictions on the buffer Start address (for incre-
menting buffers), or end address (for decrementing
buffers) based upon the direction of the buffer.
The only exception to the usage restrictions is for buff-
ers that have a power-of-2 length. As these buffers sat-
isfy the Start and end address criteria, they can operate
in a Bidirectional mode (i.e., address boundary checks
are performed on both the lower and upper address
boundaries).
Modulo Addressing
OTHER INSTRUCTIONS
© 2006 Microchip Technology Inc.