PIC16F684-I/SL Microchip Technology Inc., PIC16F684-I/SL Datasheet - Page 87

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PIC16F684-I/SL

Manufacturer Part Number
PIC16F684-I/SL
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F684-I/SL

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
11.4
The Enhanced PWM Mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 11-5:
TABLE 11-4:
© 2006 Microchip Technology Inc.
ECCP Mode
Single
Half-Bridge
Full-Bridge, Forward
Full-Bridge, Reverse
Note 1: The TRIS register value for each PWM output must be configured appropriately.
CCPR1H (Slave)
Duty Cycle Registers
Note 1:
Comparator
2: Clearing the CCP1CON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions
PWM (Enhanced Mode)
CCPR1L
PR2
TMR2
Comparator
The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit
time base.
EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer2,
toggle PWM pin and
latch duty cycle
CCP1<1:0>
P1M
00
10
01
11
R
S
P1M<1:0>
Q
CCP1/P1A
Yes
Yes
Yes
Yes
PWM1CON
Controller
Output
2
CCP1/P1A
P1B
P1C
P1D
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 11-4 shows the pin assignments for each
Enhanced PWM mode.
Figure 11-5 shows an example of a simplified block
diagram of the Enhanced PWM module.
CCP1M<3:0>
4
Note:
P1B
Yes
Yes
Yes
No
TRIS
TRIS
TRIS
TRIS
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
prevent
P1C
Yes
Yes
No
No
PIC16F684
the
CCP1/P1A
P1B
P1C
P1D
generation
DS41202D-page 85
P1D
Yes
Yes
No
No
of
an

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