PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 36

• Manufacturer Part Number: PIC16F88-I/SO
• Description: 18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F88-I/SO

• A/d Inputs: 7-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 7K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F87/88
3.8
There are conditions when the device should not write
to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built-in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch or software malfunction.
TABLE 3-1:
DS30487C-page 34
10Ch
10Dh
10Eh
10Fh
18Ch
18Dh
0Dh
8Dh
Legend:
Address
Protection Against Spurious Write
EEDATA EEPROM/Flash Data Register Low Byte
EEADR
EEDATH
EEADRH
EECON1 EEPGD
EECON2 EEPROM Control Register 2 (not a physical register)
PIR2
PIE2
Name
x = unknown, u = unchanged, - = unimplemented, read as ‘0’, q = value depends upon condition.
Shaded cells are not used by data EEPROM or Flash program memory.
Timer
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM AND
FLASH PROGRAM MEMORIES
EEPROM/Flash Address Register Low Byte
(72 ms
OSFIE
OSFIF
Bit 7
—
—
CMIF
CMIE
Bit 6
duration)
—
—
—
EEPROM/Flash Data Register High Byte
Bit 5
—
—
—
—
prevents
FREE
EEIF
EEIE
Bit 4
—
an
EEPROM/Flash Address Register High Byte ---- xxxx ---- uuuu
WRERR
Bit 3
—
—
3.9
When the data EEPROM is code-protected, the micro-
controller can read and write to the EEPROM normally.
However, all external access to the EEPROM is
disabled. External write access to the program memory
is also disabled.
When program memory is code-protected, the micro-
controller can read and write to program memory
normally, as well as execute instructions. Writes by the
device may be selectively inhibited to regions of the
memory depending on the setting of bits WRT1:WRT0
of the Configuration Word (see Section 15.1 “Config-
uration Bits” for additional information). External
access to the memory is also disabled.
WREN
Bit 2
—
—
Operation During Code-Protect
Bit 1
WR
—
—
Bit 0
RD
—
—
 2005 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
x--x x000 x--x q000
---- ---- ---- ----
00-0 ---- 00-0 ----
00-0 ---- 00-0 ----
Power-on
Value on
Reset
Value on
all other
Resets