PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 60

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PIC16F88-I/SO

Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F88-I/SO

A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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0
PIC16F87/88
TABLE 5-3:
TABLE 5-4:
DS30487C-page 58
RB0/INT/CCP1
RB1/SDI/SDA
RB2/SDO/RX/DT
RB3/PGM/CCP1
RB4/SCK/SCL
RB5/SS/TX/CK
RB6/AN5
T1OSO/T1CKI
RB7/AN6
T1OSI
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1:
06h, 106h PORTB
86h, 186h TRISB
81h, 181h OPTION_REG RBPU
9Bh
Legend:
Note 1:
Address
2:
3:
4:
5:
6:
7:
2:
Name
(6)
(6)
This buffer is a Schmitt Trigger input when configured as the external interrupt.
This buffer is a Schmitt Trigger input when used in Serial Programming mode.
Low-Voltage ICSP™ Programming (LVP) is enabled by default, which disables the RB3 I/O function. LVP
must be disabled to enable RB3 as an I/O pin and allow maximum compatibility to the other 18-pin
mid-range devices.
This buffer is a Schmitt Trigger input when configured for CCP or SSP mode.
This buffer is a Schmitt Trigger input when configured for SPI or I
PIC16F88 only.
The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register.
ANSEL
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.
This value applies only to the PIC16F87.
This value applies only to the PIC16F88.
/PGC/
/PGD/
Name
(7)
(3,7)
PORTB FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
(2)
PORTB Data Direction Register
Bit#
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Bit 7
RB7
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
INTEDG
Buffer
ANS6
Bit 6
RB6
TTL
(1)
(5)
(4)
(2)
(5)
(2)
(2)
T0CS
ANS5
Bit 5
RB5
Input/output pin or external interrupt input.
Capture input/Compare output/PWM output pin.
Internal software programmable weak pull-up.
Input/output pin, SPI™ data input pin or I
Internal software programmable weak pull-up.
Input/output pin, SPI data output pin.
AUSART asynchronous receive or synchronous data.
Internal software programmable weak pull-up.
Input/output pin, programming in LVP mode or Capture input/Compare
output/PWM output pin. Internal software programmable weak pull-up.
Input/output pin or SPI and I
Internal software programmable weak pull-up.
Input/output pin or SPI slave select pin (with interrupt-on-change).
AUSART asynchronous transmit or synchronous clock.
Internal software programmable weak pull-up.
Input/output pin, analog input
(with interrupt-on-change), Timer1 oscillator output pin or Timer1 clock
input pin. Internal software programmable weak pull-up.
Input/output pin, analog input
interrupt-on-change) or Timer1 oscillator input pin.
Internal software programmable weak pull-up.
T0SE
ANS4
Bit 4
RB4
ANS3 ANS2 ANS1 ANS0
Bit 3
PSA
RB3
Bit 2
RB2
PS2
2
C clock pin (with interrupt-on-change).
(6)
(6)
Bit 1
RB1
PS1
2
Function
C mode.
, serial programming clock
, serial programming data (with
Bit 0
RB0
PS0
 2005 Microchip Technology Inc.
2
C™ data I/O pin.
xxxx xxxx
00xx xxxx
1111 1111
1111 1111
-111 1111
POR, BOR
Value on
(1)
(2)
uuuu uuuu
00uu uuuu
1111 1111
1111 1111
-111 1111
Value on
all other
Resets
(1)
(2)

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